Design of a new intelligent fetal monitoring system

1 Introduction

Monitoring the fetus during the perinatal period and delivery can timely detect critical symptoms such as fetal hypoxia and distress, reduce fetal mortality, and improve the quality of delivery. Traditional fetal monitoring systems are relatively complex, have high power consumption, and are prone to human interference, making them inconvenient for home monitoring and self-monitoring.

The intelligent fetal monitoring system uses the MSC1210 microprocessor produced by TI with a 24-bit A/D converter and strong analog performance and digital processing capabilities. The microprocessor integrates input channel selection, buffering, amplification, gain adjustment, A/D conversion and digital processing into a single-chip circuit. Only one integrated circuit can realize the data collection of monitoring indicators such as fetal heart rate, uterine contraction pressure and fetal movement frequency, and the control of the voice device and vibrator. The control basis of intelligent fetal monitoring is the fetal heart rate. How to accurately and timely obtain the fetal heart rate is the control premise of the intelligent fetal monitoring system. In view of the low signal-to-noise ratio and non-stationary randomness of the fetal heart Doppler signal, 1/2, 2/3 and 2 times the heart rate appear when calculating the fetal heart rate, resulting in control errors. Here, wavelet analysis combined with a dual threshold algorithm is used to accurately and real-time obtain the fetal heart rate, ensuring the effective implementation of intelligent control.

2. Hardware design of intelligent computer fetal monitoring system

2.1 Intelligent Computer Fetal Monitoring System Structure

The block diagram of the intelligent computer fetal monitoring system is shown in Figure 1. It is mainly composed of ultrasonic Doppler fetal heart probe, uterine contraction probe, fetal movement probe, fetal heart signal conditioning circuit (low-pass filtering, absolute value calculation and envelope extraction, etc.), uterine contraction pressure signal conditioning circuit, voice control, sonicator, MSC1210 microprocessor and computer processing system. MSC1210 and computer processing system are the core.

MSC1210 controls the collection and communication of monitoring indicators, receives computer commands to control the voice device and the vibrator. The computer system implements functional modules such as intelligent control, communication control, data processing algorithm, and monitoring display.

2.2 Signal Conditioning Circuit

In view of the importance of fetal heart rate monitoring indicators and the complexity of fetal heart Doppler signals, the circuit of fetal heart Doppler signals is introduced here. The circuit mainly performs preprocessing on Doppler fetal heart sound signals such as low-pass filtering, absolute value operation and envelope extraction. The low-pass filter uses a second-order low-pass filter with a cutoff frequency of 250Hz to filter out high-frequency signals and interference. The absolute value operation circuit is shown in Figure 2. The signal strength is doubled, which improves the detection sensitivity. The envelope extraction circuit is shown in Figure 3, which uses a low-pass filter that combines a П-shaped filter with a cutoff frequency of 10HZ and a T-shaped filter. The parallel diode and capacitor limit the negative signal in the circuit and eliminate the high-frequency signal in a certain frequency band.

2.3 MSC1210 Microprocessor

The intelligent fetal monitoring acquisition system uses the powerful single-chip microcomputer MSC1210 launched by Texas Instruments as the processor. The MSC1210 chip integrates the 8051 microcontroller and the precision analog-to-digital converter of the FLASH memory. The chip adopts the enhanced 8051 single-chip microcomputer core, shortens the instruction execution cycle, uses a low-power design, and integrates a 24-bit resolution analog-to-digital converter (ADC) with a conversion speed of up to 1000HZ, 8-channel multiplexer, analog input channel test current source, input buffer, programmable gain amplifier (PGA), internal reference voltage source, 8-bit microcontroller, program/data Flash memory and data SRAM, etc. The digital filter filters the output data. There are three types of digital filters: fast, sin2 and sin3. The enhanced 8051 core has two data pointers, and its instruction system is fully compatible with the standard 8051 instruction system, but its execution speed is 3 times faster than that of the 8051, so it can work at a low frequency to reduce power consumption and noise. In order to reduce interference, its analog power supply and digital power supply are powered separately. Due to the integration of the chip, the hardware circuit of the intelligent fetal monitoring system becomes simple, the circuit design is more concise, and the peripheral components of the chip are very few, which greatly improves the reliability of the system, greatly shortens the development cycle, and reduces the development cost. The principle of the MSC1210 interface circuit is shown in Figure 4. The Doppler fetal heart signal and the uterine contraction pressure signal are input through IN0 and IN2, and sent to the buffer after the multiplexer, and the variable gain amplifier amplifies the input signal. The fetal movement signal is processed by the MSC1210 interrupt. MSC1210 receives the control command issued by the computer through the RS485 bus, controls the voice chip through the P2 port to complete the voice reminder function, and controls the vibrator through P1.7 to complete the automatic fetal awakening function. Using MSC1210 as a microprocessor can obtain fetal monitoring indicators more accurately and in real time, providing a guarantee for intelligent control.