What is Huawei’s “Diamond Chip” patent?

In the past two days, a patent filed by Huawei has attracted attention. The patent was jointly applied by Harbin Institute of Technology and Huawei Technologies Co., Ltd., and the content is "a hybrid bonding method for three-dimensional integrated chips based on silicon and diamond." From the announcement to yesterday, the concept of cultivated diamonds rose by more than 16%.

Many people can't help but wonder, what does this patent refer to? In fact, the keywords of this patent can be broken down, namely "silicon-based and diamond-based substrate materials", "three-dimensional integrated chip" and "hybrid bonding".

Fu Bin｜Author

Electronic Engineering World (ID: EEworldbbs)｜Produced by

Diamond chips, how to make them 

Compared with diamonds, a more accurate term should be diamond. According to Qichacha's patent search, this patent is mainly used in "silicon-based and diamond-based substrate materials". The key to this sentence is "substrate".

Chips are cut from wafers. The English word for wafer is wafer, which is the same word as "wafer". As the name suggests, just like wafer, it is composed of layers. Wafers can be roughly divided into three categories: polished wafers, epitaxial wafers, and SOI wafers. No matter what kind of wafer is made, the starting point is the polished wafer.

To explain simply, the polished wafer is cut into a thin slice from the silicon pillar, and then polished into a flat wafer. At this time, the polished wafer can be directly processed by photolithography to manufacture chips, or it can also be used as a "backup" for epitaxial wafers and SOI wafers. "Substrate"; epitaxial wafer is a wafer with a layer grown on the polished wafer "epitaxially"; SOI wafer is to introduce an oxide insulating buried layer between the top layer and the substrate.

Diamond can be used both on the substrate and in the epitaxy, or mixed with other materials, such as silicon and diamond. The human explanation is to replace the bottom layer of the chip. Maybe one or two layers of material are diamond, or most of the entire chip is made of diamond.

Why use diamond to make chips?

This is because diamond is a hexagonal warrior. It can even be called the "ultimate semiconductor material", and the chips produced are inherently better. It can be said that diamond is the "genius" among materials. The domestic industry will call it the "fourth generation semiconductor", while foreign countries mainly use the name "ultra-wide bandgap semiconductor". Specifically, different parameters correspond to different applications of diamond:

● The band gap reaches 5.5eV, making it more suitable for use in extreme environments such as high temperature, high radiation, and high voltage;

●  Thermal conductivity reaches 22 W·cm^-1·K^-1, which can be applied to high-power devices;

●  The hole mobility is 4500cm2·V^-1·s^-1, and the electron mobility is 3800cm2·V^-1·s^-1. The high carrier mobility makes it applicable to high-speed switching devices;

●  The breakdown field strength is 13MV/cm, which can be used in high-voltage devices, etc.;

●  Diamond exciton binding energy reaches 80meV, enabling it to achieve high-intensity free exciton emission at room temperature (emission wavelength is about 235nm). It is used in the preparation of high-power deep ultraviolet light-emitting diodes and extreme ultraviolet, deep ultraviolet, and high-energy particle detectors. has great potential.

The patent documents disclosed by Huawei explain that diamond is a wide-bandgap semiconductor with high breakdown field strength, high carrier mobility, and radiation resistance. It is used in heat sinks, high-power, high-frequency devices, optical windows, etc. Quantum information and other fields have great application potential.

Of course, it should be noted that although diamond chips look beautiful, they have not yet been industrialized on a large scale. The difficulties are:

First, not all diamonds can be used to make chips, but extremely pure diamonds. Diamond is divided into several main grades: quantum grade, electronic grade, optical grade, thermal grade and mechanical grade. The two main parameters are dislocation density and nitrogen content. Diamond used for chips needs to be above electronic grade.

Second, there is a bottleneck in diamond chip doping. Pure diamond itself is an insulator and can only become a semiconductor when doped. At present, p-type doping of diamond chips is relatively mature, mainly boron (B) doping, while n-type doping is a problem in industrialization. n-type doping elements have high ionization energy in diamond and are difficult to find. There are currently divergent opinions in academia and industry on the appropriate donor elements, and of course there is gradual progress.

Third, the process of making diamond chips and then the device itself has been studied for decades. Many problems have arisen in the process, which have been solved one by one as the research progresses. But at present, many problems are limited to the research field, and practical applications in the industry will inevitably lead to more problems. For example, the design and manufacturing of diamond FETs are different from standard devices, and there are many inconveniences in the photomask process, which will limit its mass production. .

Fourth, artificial diamond is still very expensive. The price of silicon carbide (SiC) is 30 to 40 times that of silicon, the price of gallium nitride (GaN) is 650 to 1,300 times that of silicon, and the price of diamond material that can be used to make chips is almost 10,000 times that of silicon. The reason why silicon carbide and gallium nitride can be used on a large scale is that the improved efficiency offsets the material cost and is even cheaper. The cost gap between diamond chips is too large, making it difficult to apply them to the industry.

However, at present, the United States and Japan have been promoting the industrialization of diamond chips, including the American Akhan Company, the British Element Six Company, the Japanese NTT Company, the Japanese Institute of Industrial Technology (AIST), the Japanese Institute of Materials and Materials (NIMS), Carnegie Institution of the Geophysical Laboratory of the United States, and Argonne National Laboratory of the United States. Among them, Akhan had planned to become the first company to truly realize the industrialization of diamond semiconductors.

It can be said that whoever seizes the opportunity first will be the one ahead, so the whole world is sparing no effort to develop. Judging from past patents, Huawei is also very concerned about the development of diamond, which shows its concern for future technology.

Dimension-enhancement attack on chips

"Three-dimensional integrated chip" and "hybrid bonding" actually correspond to "3D packaging and interconnection" in the chip industry.

What is 3D integration? Just like building a tall building on a three-dimensional space, future chips will not be limited to flat development, but will gradually increase the "latitude", just like making burgers, constantly stacking high to enhance performance. In the future, chips will not be just a single CPU/MCU chip like now, but will integrate accelerators, memory, and storage.

Previously, Song Jiqiang, vice president of Intel Research and director of Intel China Research, said at WAIC 2021 that heterogeneous packaging is a smaller system that integrates different computing capabilities. It is integrated by different Dies, so it can use different architecture chips to have unique performance and power consumption advantages when processing different data and different tasks.

What is hybrid bonding? We disassemble the chip into many small chips (chiplets), then packaging each chip together and gluing them together is a huge problem. If they are glued with a large distance, it will inevitably affect the final chip performance. Hybrid bonding and 3D packaging are a good pair. It can further reduce the bump spacing and power consumption between die during packaging. In this way, packaging technology can allow many new chips to be well interconnected.

Wafer bonding is an emerging semiconductor processing technology that has developed rapidly in the past decade. It has important applications in MEMS, CIS, memory chips and other fields. Through interface materials, it is divided into glue bonding with an intermediate layer , eutectic bonding, metal hot pressing bonding, fusion bonding without intermediate layer and anodic bonding, etc. The English name for hybrid bonding is Hybrid Bonding. As the name suggests, it is named after it contains the characteristics of both melt bonding and metal bonding.

Conceptually, hybrid bonding refers to the simultaneous bonding of dielectric and metal bond pads in one bonding step. Hybrid bonding includes wafer-to-wafer (W2W, wafer-to-wafer bonding) and die-to-wafer (D2W, chip-to-wafer bonding). The former is more mature, and the latter has more processes.

Both technologies are the key to breakthrough chip performance in the future, especially after entering the CFET era after 1nm, hybrid bonding will be the key.

Of course, there's more to the concept than that, and hybrid bonding processes (including dielectric PECVD, copper ECD, CMP, plasma activation, alignment and bonding, and singulation) involve stringent film quality specifications, high levels of cleanliness, and high test coverage , it is extremely difficult to implement. There are currently very few players in the world, and the technology is not yet fully mature. We are still looking for ways to enter the industry. What's more, it is used in diamond chips.

So, in this Huawei patent, what is the focus of three-dimensional integration and hybrid bonding?

Patent documents show that the three-dimensional integration of silicon-based and diamond-based substrate materials through Cu/SiO2 hybrid bonding technology can integrate the mature processes and production lines of silicon-based semiconductor devices, the advantages of high production efficiency, low cost and extremely high diamond The development potential is to provide heat dissipation channels for three-dimensional integrated silicon-based devices to improve the reliability of the devices. However, the existing Cu/SiO2 hybrid bonding technology mostly uses silicon as the substrate for integration, and its integration process is not completely suitable for diamond. There are the following problems: