Intel announces establishment of Integrated Photonics Research Center

The collaborative research center, which brings together world-renowned photonics and circuit researchers, will pave the way for computing interconnection in the next decade.

Intel Labs recently established the Intel® Integrated Photonics Research Center for Data Center Interconnect. The center's mission is to accelerate innovation in the performance expansion and integration of optical interconnect input/output (I/O) technology, focusing on optoelectronic technology and devices, CMOS circuits and link architecture, as well as packaging integration and fiber coupling.

“At Intel Labs, we firmly believe that a single organization cannot successfully translate all the necessary innovations into research reality,” said James Jaussi, Intel senior principal engineer and director of the Intel Labs PHY Research Lab. “By collaborating with some of the top scientists across the country, Intel is opening the door to integrated optoelectronics advancements for the next generation of computing interconnects. We look forward to working closely with these researchers to explore how to overcome upcoming performance barriers.”

As data movement between servers continues to increase, new challenges are being posed to the capabilities of today’s network infrastructure. The industry is rapidly approaching the practical limits of electrical I/O performance. As demand continues to grow, the power consumption performance regulation of electrical I/O cannot keep pace and will soon limit the power available for computing operations. This performance barrier can be overcome by integrating computing chips and optical interconnect I/O, which is one of the focuses of Intel’s Integrated Photonics Research Center.

Intel recently demonstrated technology advances in integrating the key building blocks of optoelectronics. Light generation, amplification, detection, modulation, CMOS interface circuits and packaging integration are key to achieving the required performance to replace electrical as the primary high-bandwidth out-of-package interface.

In addition, optical interconnect I/O is expected to significantly outperform electrical I/O in key performance indicators such as accessibility, bandwidth density, power consumption, and latency. Further innovations in multiple frontiers are also essential to simultaneously improve optical performance and reduce power and cost.

About the Research Center: Intel’s Integrated Photonics Research Center for Data Center Interconnect brings together multiple universities and world-renowned researchers to accelerate innovation in performance expansion and integration of optical interconnect input/output (I/O) technology. Its research vision is to explore technology expansion paths to meet the energy efficiency and bandwidth performance requirements for the next decade and beyond.

Intel is well aware that academia is at the core of technological innovation and is committed to promoting scientific research innovation in leading academic institutions around the world. The establishment of the Integrated Photonics Research Center reflects Intel's commitment to working with academia to develop new advanced technologies to further advance computing.

Researchers participating in the research center include:

John Bowers, University of California, Santa Barbara

Research Project: Heterogeneous Integration of Quantum Dot Lasers on Silicon

Project Description: The UC Santa Barbara team will investigate the integration of indium arsenide (InAs) quantum dot lasers with conventional silicon photonics. The goal of the project is to elucidate the expected performance and design parameters for single-frequency and multi-wavelength sources.

Pavan Kumar Hanumolu, University of Illinois at Urbana-Champaign

Research project: Low-power optical transceiver via duobinary signaling and baud rate clock recovery.

Project Description: This project will develop an ultra-low power, high-sensitivity optical receiver using a novel transimpedance amplifier and baud rate clock and data recovery architecture. The optical transceiver module prototype will be implemented in a 22nm CMOS process, demonstrating ultra-high jitter tolerance and excellent energy efficiency.

Arka Majumdar, University of Washington

Research Project: Non-volatile reconfigurable optical switching networks for high-bandwidth data communications

Project Description: The University of Washington team will investigate low-loss, non-volatile electrically reconfigurable silicon photonic switches using emerging chalcogenide phase-change materials. Unlike existing tunable mechanisms, the developed switch will retain its state, allowing for zero static power consumption.

Samuel Palermo, Texas A&M University

Research Project: Sub-150fJ/b Optical Transceivers for Data Center Interconnects

Project Description: This project will develop energy-efficient optical transceiver circuits for massively parallel, high-density, and high-capacity optical interconnect systems. The goal is to improve energy efficiency by employing dynamic voltage-frequency scaling, low-swing voltage-mode drivers, ultra-sensitive optical receivers with tightly integrated photodetectors, and low-power optical device tuning loops in transceivers.

Alan Wang, Oregon State University

Research Project: 0.5V Silicon Micro-Ring Modulator Driven by High-Mobility Transparent Conductive Oxide

Project Description: This project aims to develop a low-drive voltage, high-bandwidth silicon micro-ring resonator modulator (MRM) through heterogeneous integration between silicon MOS capacitors and high-mobility Ti:In2O3. The device is expected to overcome the energy efficiency bottleneck of optical transmitters and may be co-packaged in future optical I/O systems.

Ming Wu, University of California, Berkeley

Research Project: Wafer-Level Optical Packaging for Silicon Photonics

Project Description: The UC Berkeley team will develop integrated waveguide lenses that have the potential to enable contactless optical packaging of low-loss and high-tolerance fiber arrays.

SJ Ben Yoo, University of California, Davis

Research Project: Heat-free and energy-efficient scalable high-capacity silicon photonic transceivers

Project Description: The UC Davis team will develop extremely energy-efficient athermal silicon photonic modulator and resonant photodetector optical integrated circuits that can scale to 40 Tb/s at 150 fJ/b efficiency and 16 Tb/s/mm I/O density. To achieve this goal, the team will also develop a new 3D packaging technology for vertically integrating photonic and electronic integrated circuits with an interconnect density of 10,000 pads per square millimeter.