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SPI slave returns data to the host in dislocation [Copy link]

This post was last edited by Li Jiahui on 2020-4-4 17:28

The data sent by the two 32-bit MCU hosts to the slaves can be received correctly by the slaves. Each time the slave receives a byte, it returns 0x5555 to the host.

Send a packet of data. If the return is correct, the data returned by the slave is 0x5555. If the return is wrong, the data returned by the slave is 0xAAAA. My configuration is that both the slave and the host read the data on the first rising edge. In four-wire mode, after analysis, this is caused by data shifting. However, the clock does not change in correct reception and error reception. The data is read on the first rising edge of the clock. I have been confused for a long time and don't know what caused it? Can the masters take a look?

ca1ee6a9aa4b9024ed6e8a8dab52992.jpg (242.98 KB, downloads: 0)

正确接收波形图

正确接收波形图

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错误接收波形图

错误接收波形图

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主机配置

主机配置

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从机配置

从机配置
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[attach]470198[/attach] The data I read out is like this. The last clock pulse is a low pulse added by me. Normally there is no low pulse. This set of data becomes F78B when it is given to the serial port. I am confused about the reason. [attach]470199[/attach]Do you think it is the same as what you said?   Details Published on 2020-4-13 22:37
 

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Interference? This value is also very special. Is there any data change added?
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It shouldn't be. The test did not find any other data, and there was no interference. The amount of data I sent was a bit large. I did not operate anything in the interrupt, but simply fetched data from the cache and sent it.   Details Published on 2020-4-4 17:12
 
 

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okhxyyo posted on 2020-4-4 17:03 Interference? This value is also very special. Is there any data change added?

It shouldn't be. The test did not find any other data, and there was no interference. The amount of data I sent was a bit large. I did not operate anything in the interrupt, but simply fetched data from the cache and sent it.

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There is a problem with the description. Send a packet of data. If the return is correct, the data returned by the slave is 0x5555. If the return is wrong, the slave returns 0xAAAA.

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Check it with a logic analyzer  Details Published on 2020-4-5 10:18
 
 
 

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"Send a packet of data. If the return is correct, the data returned by the slave is 0x5555. If the return is wrong, the data returned by the slave is 0xAAAA."

What does "all" mean? What does "return the correct words" mean? I still don't understand.

SPI sends and receives data simultaneously, but you have to send the next byte before sending the status of the previous byte.

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Yes, the master sends the next byte so that the slave can receive the previous byte.  Details Published on 2020-4-7 18:39
 
 
 

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Li Jiahui published on 2020-4-4 17:18 The description is a bit wrong. Send a packet of data. If the return is correct, the data returned by the slave is 0x5555. If it returns an error...
Use a logic analyzer to check
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No   Details Published on 2020-4-8 18:56
 
 
 

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huo_hu posted on 2020-4-5 03:24 "Send a packet of data. If the return is correct, the data returned by the slave is 0x5555. If the return is wrong, the slave returns...

Yes, the master sends the next byte so that the slave can receive the previous byte.

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littleshrimp posted on 2020-4-5 10:18 Take a look at it with a logic analyzer

No

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The data I read out is like this. The last clock pulse is a low pulse added by me. Normally there is no low pulse. This set of data becomes F78B when it is given to the serial port. I am confused about the reason.

Do you think it is the same as what you said?

This post is from stm32/stm8
 
 
 

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