Embedded PLC System Design Based on LPC2294 Processor

1 Hardware structure design of embedded PLC

1.1 Selection of microcontroller chip

The CPU is the core of the PLC . It can recognize various instructions input by the user in a specific format, and according to the provisions of the instructions and the current state of the field I/O signal, it issues corresponding control instructions to complete the predetermined control tasks. This design uses the LPC2294 microcontroller produced by Philips. LPC2294 is a CPU chip based on 32-bit ARM7TDMI-S and supports real-time simulation and tracing. It has 256kB embedded high-speed Flash memory and 16kB on-chip SRAM. LPC2294 uses a 144-pin package, has extremely low power consumption and up to 112 general-purpose I/O ports, 9 edge or level-triggered external interrupt pins, a maximum of 60MHz working crystal oscillator, multiple 32-bit timers, PWM units, real-time clocks and watchdogs, 8-channel 10-bit ADCs with conversion times as low as 2.44μs, 4-way advanced CAN interfaces, and 2-way UART (16C550), high-speed I2 C (400kbit/s) and 2-way SPI buses. The LPC2294's rich hardware resources and complete functions make this microcontroller particularly suitable for automotive, industrial control applications, medical systems, and fault-tolerant maintenance buses.

1.2 Overall structure of the hardware system

This system uses the ARM chip LPC2294 as the CPU and is designed as a basic mode with 14 PNP inputs and 10 relay outputs. The overall hardware structure includes:

Power supply and reset module, ARM microcontroller, Flash memory expansion module, switch input and output module, analog input and output module, RS485 interface and CAN interface communication module, etc. The structure of the system is shown in Figure 1.

1.2.1 Switching input and output interface circuit

Figure 2 shows a diagram of a switch input. The front end of this circuit is a first-order filter circuit composed of R and C to prevent external interference signals from entering the system. The input control switch signal (DC 24V) connected to the input end is input to the input end of the optocoupler (PC816) through the input point 10.0 and the current limiting resistor. M is the common input end of the input points 10.0~10.7. Because the P0.23 port is set to input mode and there is no pull-up resistor inside the port line, an external pull-up resistor is required to prevent the port line from being suspended. When the 10.0 input terminal is 24V, the photodiode in the optocoupler is turned on, the output end of the phototransistor is pulled to a low level, the LED indicating the input status of this road is lit, and P0.23 is set to a low level. When the CPU accesses this signal, the value of the input process image register corresponding to the input point is set to 1. When the 10.0 input terminal is 0V, P0.23 is a high level. When the CPU accesses this signal, the value of the input process image register corresponding to the input point is set to 0. The circuits and working principles corresponding to the remaining input points are the same.

Figure 3 shows the relay output module diagram. The diode connected in parallel at both ends of the relay coil in the figure plays a freewheeling role. The working principle of this module is as follows: when the internal output process image register is, LPC2294 port P1.16 outputs 0, the phototransistor is turned on, the relay coil is energized, and the output point is connected; conversely, when the internal output process image register is 0, port P1.16 outputs 1, the relay coil is de-energized, and the output point is disconnected.

It should be noted that when the GPIO port of LPC2294 is first powered on, the voltage of its output port (such as P1.16 in this figure) is unstable, which can easily cause the external relay to malfunction and cause the external device to work unstably. For this reason, we designed the circuit in Figure 4 to improve the stability of the relay output.

This is a monostable circuit composed of NE555 timer, in which VCC5.0D is connected to the collector of the photocoupler in Figure 3. Its working principle is: when the system is powered on, the levels of pins 2 and 6 cannot change suddenly and remain at a low level. Analysis of the internal circuit of NE555 shows that at this time, the output pin 3 outputs a high level, and the circuit begins to charge the R and C circuits. As time goes by, the levels of pins 2 and 6 continue to rise. When it rises to 23VCC, the output pin 3 will flip to a low level, turning on the transistor, and VCC5.0D outputs 5V. In this way, after a period of time after the system is powered on, the level of the I/O port stabilizes, and the photocoupler is powered on and starts working. The duration tW of the temporary steady state depends on the size of the external resistor R and the capacitor C. tW is equal to the time required for the capacitor voltage to rise from 0 to 23VCC during the charging process, that is:

1.2.2 Analog input circuit design

First, the current signal output by the field sensor is converted into a 0~5V voltage signal for collection through resistor R66. Considering the anti-interference and protection of the microprocessor circuit, a linear optocoupler HCNR201 is added to the output end of the conversion circuit. The hardware circuit is shown in Figure 5.

1.2.3 Serial communication interface circuit design

In order to be compatible with other industrial control products, we adopted the RS-485 interface standard in our design. In order to convert the TTL level to the RS485 level, the SP485E transceiver was selected. The data transmission rate of the SP485E chip can be as high as 10Mbps. Its biggest feature is that it provides ESD protection circuits for the transmitter output and receiver input pins. The interface circuit is shown in Figure 6.