Buck Converter Using Low-Side PWM IC

The most common switching power supply structure is the buck converter, which can efficiently convert high voltage to low voltage. Figure 1 shows a typical buck converter, where the N-channel MOSFET Q1 requires a floating gate drive signal. The floating gate drive is part of the PWM (pulse width modulation) controller IC. Depending on the design of the controller, Q1 can be either N-channel or P-channel. Unfortunately, the rated voltage of the IC must be as high as the input voltage, which limits the maximum voltage it can handle.

The circuit in Figure 2 uses a simple voltage level shifter to control a pass transistor with a low-side IC that has a ground-referenced gate drive using a buck converter. Because the level-shift circuit in the PWM IC does not have to withstand large voltages, a converter with arbitrarily high input voltages can be implemented.

A PWM IC with a low-side gate drive can power N-channel MOSFETs, turning them on when they have a positive gate-source voltage. The circuit in Figure 2 uses a P-channel device as the high-side MOSFET; it turns on when the gate-source voltage is negative. Therefore, the control signal from the PWM controller must be inverted. A MOSFET totem-pole configuration consisting of Q2 and Q3 also works, but an inverting gate driver can also be used.

Capacitor C2 performs the level shifting function. Its value must be large enough to maintain its charge at the switching frequency, but its voltage must be small enough to keep up with the changes in the input voltage. Resistor R1 and P-channel MOSFET Q3 charge C2 to a voltage VC = VIN – VCC, where VC is the voltage across C2, VIN is the input voltage, and VCC is the supply voltage for the totem pole structure of Q2 and Q3 and the PWM IC. The supply voltage must be lower than the breakdown voltage of Zener diode D2. In addition, current flows through D2 and C2 whenever Q2 is on, reducing efficiency. D2 limits the voltage across C2 to the value in the above equation. When Q3 is on, D2 becomes forward biased if it attempts to boost the voltage. This circuit applies 0V between the gate and source of Q1 when Q3 is on, and –VCC when Q2 is on.

Resistor R1 also ensures that the gate-source capacitance of Q1 is discharged, which keeps Q1 off when the totem-pole output voltage is high. Diode D2 limits the gate-source voltage of Q1 to 12V, regardless of the circuit input voltage. Capacitor C2 is transparent to the gate drive pulses of Q1, so the gate drive capability of the circuit is as good as the totem-pole circuit itself. Therefore, the level shifting has no limit on the size of the MOSFET that the circuit can drive.

Figure 3 shows an actual buck converter using this scheme. The input voltage of the converter is 18V~45V, and its output voltage is 12V at an output current of 1.5A. The converter uses the LM5020-1 flyback/boost/forward/SEPIC (single-ended primary inductor converter) PWM control IC from National Semiconductor.

The components designed for the previous figure are retained, but some functions are added, such as input voltage filtering by C9, input undervoltage lockout by R2 and R7, soft-start function by C3, 500 kHz switching frequency setting function by 12.7 kΩ R3, feedback compensation by C7, C8 and R6, and output voltage setting by R9 and R10.

The LM5020-1 provides current mode control, but in this circuit, it uses voltage mode control. An internal sawtooth current source with a peak value of 50μA is used to ramp up the voltage, adding slope compensation to a current signal. This current flows through the 5.11kΩ resistor R4 and an internal 2kΩ resistor, generating a peak-to-peak voltage of 50μA × (2kΩ + 5.11kΩ) ≈ 300 mV at the CS pin (Pin 8). The COMP pin (Pin 3) compares this sawtooth wave with the output error voltage of the COMP pin to generate the correct duty cycle signal for Q1.

Figure 4 shows the switching waveforms of the circuit. Oscilloscope Channel 1 (lower curve) shows the gate drive signal generated by the LM5020-1. Channel 2 (middle curve) shows the corresponding totem pole output voltage. Channel 3 (upper curve) shows the totem pole output voltage after level shifting between the gate and source of Q1. The peak value of the gate-source voltage of Q1 is equal to the input voltage, and its amplitude is about 8V, which is the value of the power supply signal generated internally by the LM5020-1. All waveforms are clear, with short rise and fall times. The full load efficiency of the circuit is 86% and 83% at input voltages of 18V and 45V, respectively.