【GD32450I-EVAL】UART

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【GD32450I-EVAL】UART [Copy link]

The serial port of this board is relatively crude, it is directly connected to 232, and the max3232 is used for conversion.

The onboard serial port used is USART0, and from the schematic diagram, we can see that it is connected to PA9 and PA10.

(I) Clock
First, to initialize the serial port, you need to enable the clock:
including the GPIO clock and the serial port peripheral clock:

  /* enable GPIO clock */
  rcu_periph_clock_enable(RCU_GPIOA);

  /* enable USART clock */
  rcu_periph_clock_enable(RCU_USART0);

Regarding the clock source, the reference manual mentions

---

"Generated by peripheral clock division, where USART0/5 is divided by PCLK2, and USART1/2 and
UART3/4/6/7 are divided by PCLK1;"

---

PCLK1 does not refer to a certain bus, but the clock of each peripheral.

rcu_periph_clock_enable(RCU_USART0);

This is the PCLK switch dedicated to USART.

But the APB2 in front still needs to be enabled. But this part is enabled at the system initialization.
First, let's look at the startup_gd32f450.s file.
The SystemInit function is called before the initialization call main.

Another call is made inside

system_clock_config();

Then call it:

system_clock_200m_25m_hxtal();

function:

static void system_clock_200m_25m_hxtal(void)
{
    uint32_t timeout = 0U;
    uint32_t stab_flag = 0U;
    
    /* enable HXTAL */
    RCU_CTL |= RCU_CTL_HXTALEN;

    /* wait until HXTAL is stable or the startup time is longer than HXTAL_STARTUP_TIMEOUT */
    do{
        timeout++;
        stab_flag = (RCU_CTL & RCU_CTL_HXTALSTB);
    }while((0U == stab_flag) && (HXTAL_STARTUP_TIMEOUT != timeout));

    /* if fail */
    if(0U == (RCU_CTL & RCU_CTL_HXTALSTB)){
        while(1){
        }
    }
         
    RCU_APB1EN |= RCU_APB1EN_PMUEN;
    PMU_CTL |= PMU_CTL_LDOVS;

    /* HXTAL is stable */
    /* AHB = SYSCLK */
    RCU_CFG0 |= RCU_AHB_CKSYS_DIV1;
    /* APB2 = AHB/2 */
    RCU_CFG0 |= RCU_APB2_CKAHB_DIV2;
    /* APB1 = AHB/4 */
    RCU_CFG0 |= RCU_APB1_CKAHB_DIV4;

    /* Configure the main PLL, PSC = 25, PLL_N = 400, PLL_P = 2, PLL_Q = 9 */ 
    RCU_PLL = (25U | (400U << 6U) | (((2U >> 1U) - 1U) << 16U) |
                   (RCU_PLLSRC_HXTAL) | (9U << 24U));

    /* enable PLL */
    RCU_CTL |= RCU_CTL_PLLEN;

    /* wait until PLL is stable */
    while(0U == (RCU_CTL & RCU_CTL_PLLSTB)){
    }
    
    /* Enable the high-drive to extend the clock frequency to 200 Mhz */
    PMU_CTL |= PMU_CTL_HDEN;
    while(0U == (PMU_CS & PMU_CS_HDRF)){
    }
    
    /* select the high-drive mode */
    PMU_CTL |= PMU_CTL_HDS;
    while(0U == (PMU_CS & PMU_CS_HDSRF)){
    } 
    
    /* select PLL as system clock */
    RCU_CFG0 &= ~RCU_CFG0_SCS;
    RCU_CFG0 |= RCU_CKSYSSRC_PLLP;

    /* wait until PLL is selected as system clock */
    while(0U == (RCU_CFG0 & RCU_SCSS_PLLP)){
    }
}

This function initializes APB2.

(II) Setting GPIO functions and remapping

For related mapping functions, please refer to the data sheet

to map to AF7 and set GPIO pull-up and pull-down functions.

    // configure the USART0 Tx pin and USART0 Rx pin 
    gpio_af_set(GPIOA, GPIO_AF_7, GPIO_PIN_9);
    gpio_af_set(GPIOA, GPIO_AF_7, GPIO_PIN_10);
    
    // configure USART0 Tx as alternate function push-pull 
    gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_9);
    gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_9);

    // configure USART0 Rx as alternate function push-pull 
    gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_10);
    gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_10);

(III) Configuring USART

    /* USART configure */
    usart_deinit(USART0);
    usart_baudrate_set(USART0, 115200U);
    usart_receive_config(USART0, USART_RECEIVE_ENABLE);
    usart_transmit_config(USART0, USART_TRANSMIT_ENABLE);
    usart_enable(USART0);

We will not delve into this configuration for now. Let's first talk about basic transmission and reception. We will study the registers in detail later when we have a chance to do DMA transmission and reception.

(IV) Send
Write a send function:

void PRINTF_UART0(char *data)
{
	int i;
	for(i=0;i<strlen(data);i++){
		usart_data_transmit(USART0, data[i]);
		while(RESET == usart_flag_get(USART0, USART_FLAG_TBE));
	}
}

(V) Hardware connection
There is only one 232 male port on the board, which is quite troublesome, because generally only hosts use male ports, so the serial port cables are all male, and male to male cannot be connected.

It happened to be a holiday, and the female-to-female adapter cable that I usually use was not with me. I searched the bottom of the box for a long time and found another cable, but it didn't work.
In the picture, there is a logic analyzer and a 232 to USB converter, and all the transmission and reception are fine. Finally, it was found that there was a problem with this adapter cable!
The general female-to-female adapter cable needs to reverse the RX and TX, but it turned out to be a one-to-one connection. This is a mess, what should I do? At this time, I suddenly remembered a board I made before:


The design used here is more convenient for experiments. Connecting the jumper code horizontally and vertically can reverse the TX and RX.

Polling execution in the main function:

delay_ms(100);
PRINTF_UART0("welcome!\r\n");

Effect:

okhxyyo

GigaDevice GD32450I-EVAL

Summary post: https://en.eeworld.com/bbs/thread-1140981-1-1.html