Why should you care about power management?
Power management is becoming very important due to a variety of factors. For mobile handheld embedded systems, there is always pressure to provide more functions while increasing battery life. When the battery itself cannot improve but needs to meet this requirement, the pressure falls on chip vendors to provide chips with lower power consumption and better performance. At the same time, in order to meet the requirements of shortening design cycles and accelerating time to market, flexible and programmable devices with lower power consumption are needed. In addition, the green movement requires reducing battery waste, which in embedded systems translates into fewer battery replacements. Similarly, government regulations around the world (such as Energy Star) also require reducing standby current in electrical equipment. The next generation of embedded systems will require extremely low power consumption in both active and sleep modes, and the flexibility and programmability required to meet time-to-market requirements will also need to be improved.
In addition to lower current consumption, there is also a need for lower system voltages. A few years ago, the minimum standard operating voltage was 3.3 volts. Today, the minimum standard operating voltage is 1.8 volts. Graphing this trend, it will become a reality in the future that the minimum standard operating voltage of devices will extend into the sub-volt range. This will make it possible to build SoC-based designs with a single AA or AAA battery (the battery voltage ends at about 0.9 volts). Although some SoC-based designs can run at 1.8 volts today, more often the analog performance is degraded at such low voltages. For handheld battery-powered designs that require good analog performance, being able to run at less than 1 volt and still meet analog performance requirements can allow the use of a single AA or AAA battery. This means fewer batteries are needed and reduced costs for the customer.
How to achieve sub-volt operation?
Sub-volt operation is possible when an embedded SoC device has a built-in boost converter that can boost an input voltage (e.g., 0.9 volt input voltage) to a higher system voltage level (e.g., 3.3 volts). In this mode, it is important that the noise from the boost converter does not affect the performance of analog peripherals. Figure 1 shows the system-level connections for an integrated boost converter that is part of a PSoC 3 programmable system-on-chip from Cypress Semiconductor.
Figure 1 System-level connection from an external low voltage to an internal higher voltage
Having an integrated boost converter capable of accepting sub-volt input voltages has the following advantages:
1. Ability to operate the system from a single AA or AAA battery
2. Ability to provide a minimum guaranteed system voltage even with a varying supply voltage
3. Ability to use the boosted output voltage to run other circuits in the system that require a higher voltage. For example: LCD, sensor circuits, etc.
Wide supply voltage range:
A wide voltage range spanning from 1.8V (0.9V to activate boost) to 5.5V provides the user with maximum flexibility for the following reasons:
1. Ability to span from standard battery voltage to end of life voltage for most common batteries as shown in Table 1
2. Compatible with legacy system voltages of 3.3V and 5V
3. 5.5V upper limit provides more than 5V margin for rail-to-rail measurements of signals from legacy systems
By providing a built-in low-dropout linear regulator inside the device, a wide range of external power supply voltages can be provided. This wide range of external power supply voltages can maintain a stable low core voltage for the chip. In addition, both the digital domain and the analog domain have separate independent internal regulators to ensure that the analog performance will not be damaged by noise from the digital power rail. Figure 2 shows the system-level connection and the internal regulator that can accommodate a wide power supply voltage range.
Figure 2 System-level connections for the internal regulator
In Figure 2, Vddd and Vdda can vary from 1.71 volts to 5.5 volts while the built-in analog and digital regulators ensure that the core still runs at a stable low voltage. If properly designed, this system can also ensure the same analog performance over the entire supply voltage range.
Independent power supply for I/O group
To allow connection to other devices in the system that may have different system voltages, an SoC needs to have separate I/O supplies that can be independently set to any voltage within a wide voltage range. As shown in Figure 3, an SoC with four I/O groups, each of which can be driven by any voltage from 1.8 volts to 5 volts, can provide seamless connection to other devices on the PCB.
Figure 3 Independent supply voltage for each I/O bank provides seamless connectivity to devices that may operate at different voltages.
Flexible power modes
While low power consumption in programmable systems is still a myth, well thought out programmable SoCs are now capable of world class currents that match standalone MCUs. Keeping in mind the end customer’s application, the desirable power modes and their currents are shown in Table 2.
It is the mode in which the system operates normally when the user actively uses the operating modes shown in Table 1. A programmable SoC will allow the selective disabling of unneeded peripherals in this mode.
In alternate operation mode, a smaller number of selected peripherals are actively operating. This provides a reduced power mode that can be entered from normal operation. Once exited from this mode, the system returns to normal operation. An example of this is an embedded system with a display, where the power to the display can be turned off separately while the embedded system continues to run. When the display needs to be turned off, the system enters alternate operation mode, where the power to the peripherals required by the display is turned off.
Sleep mode is often used in battery powered embedded systems. This is an extreme low power mode where all peripherals are in a low power state, while a real time clock is maintained. This mode is also used in systems that need to cycle between active and sleep modes frequently. An example of this is a temperature sensor that needs to update its reading every minute. The system would wake up every minute, take a reading and go back to sleep mode. The result is lower average power consumption.
Hibernate is the lowest power mode for a device, while still maintaining memory contents and configuration. It can wake the device from an I/O source, which also provides the ability for the user or another device in the system to wake the device. Hibernate mode can also be used to eliminate the need for a power switch in a handheld device (since pressing any button can wake the device).
in conclusion
Programmable System-on-Chip (PSoC) provides high integration and provides users with the ability to build their own custom peripherals using an efficiently configurable and programmable system. A well-designed programmable SoC can provide world-class power management capabilities that not only meet the power requirements of the MCU but also provide a configurable power management system that also provides accurate analog performance.
Cypress Semiconductor's PSoC 3 and PSoC 5 series are field-programmable embedded SoCs with programmable digital blocks and configurable analog blocks. These devices are designed to provide users with the greatest possible flexibility and programmability while consuming very little sleep current and operating current. It also provides precise analog performance (16-bit to 20-bit accuracy). PSoC Creator is an integrated development environment software that can be used to quickly develop designs for the PSoC 3 and PSoC 5 series from end to end, including device selection, configuration/programming of digital and analog peripherals, configuration of the power system, firmware development, debugging and programming.
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