In the digital age, driven by cloud computing, 5G, automotive electronics, AIoT, and smart terminals, advanced process chips and packaging are ushering in an explosion, which has extremely high requirements for performance, intelligence, security, and reliability. High-bandwidth and high-scalability IP modules have also become the key to improving the performance of post-Moore SoC systems, and are crucial to the implementation and iteration of core products such as computing, storage, and connectivity.
What are the current challenges and development trends of popular high-speed interface technologies such as DDR, SerDes and Chiplet, which are the most cutting-edge in the industry, and how can they help design companies break through performance bottlenecks? From DDR5/4, LPDDR5/5X to GDDR6/6X, HBM2e/3, and multi-standard SerDes such as PCIe5/6, USB3.2/4, to high-speed interconnection UCIe Chiplet, how do chips balance cost and performance? How to choose Which solution best matches the application scenario? Under various cross-process and cross-package challenges, how to select IP to achieve high reliability and cost-effectiveness and ensure the success of mass production of the system in the first time? Under the pressure of huge chip tape-out costs, yield risks and other pressures, how to cross the gap and use integrated system architecture, bus/core splicing, IP/SoC integration to achieve full protection and risk protection? In the current ups and downs of the market, how to seize opportunities and realize business opportunities to ensure rapid integration of various IPs and rapid mass production of products?
Innosilicon, China's one-stop high-end IP leader, will use its more than ten years of leading advantages in segmented fields and successful experience in mass production of billions of FinFETs to develop a full set of high-speed interfaces from 55nm to 5nm across major process plants around the world. IP, advanced process SoC system architecture and GPU core innovation capabilities, together with Zhicun Technology, a storage and computing integrated AI chip technology provider, and Chuangfeixin Technology, a one-stop non-volatile storage IP and independent storage IC solution provider, to provide industry colleagues with Bring new ideas and efficient solutions. Welcome to come and share and discuss!
Event information
Event name: 2023 High-end Integrated Circuit IP Technology Seminar • Beijing Station
The purpose of the event: to build a technology exchange platform between the upstream and downstream of the integrated circuit industry, to get closer to the forefront of high-end integrated circuit IP development, to enhance the understanding and application of local IP technology, and to jointly promote the development of Beijing's integrated circuit industry.
Event time: June 8, 14:00-16:30 pm
Venue: Zhongguancun Core Park Multi-Function Hall, 4th Floor, Building 4, Zhongguancun Chuangye Street, Beijing
Sponsor: Zhongguancun Core Park (Beijing National “Core Fire” Mass Entrepreneurship Base) Core Technology Co., Ltd.
Gains from participating in the conference: You will have the opportunity to have an in-depth understanding of the cutting-edge local IP technology, discuss development with IC colleagues in Beijing, and communicate directly with the technical experts of Innosilicon Technology face-to-face. Innosilicon will bring the most cutting-edge high-speed interface IP three-piece technology and the latest 7/5nm advanced process IP results, and conduct in-depth discussions with industry colleagues on issues of concern to the industry chain such as high-end IP and chip performance breakthroughs, cost risk control, etc. Discuss and explore effective solutions and development ideas.
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