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Crosstalk Elimination Technology in Altium Designer [Copy link]

By Jane Zhang , Aug 27, 2019

Remember when you were in school and the teacher asked the whole class a question and you knew the answer! You and a few other students excitedly raised your hands, hoping that the teacher would call on you to answer the question. If you were lucky enough to be called on to answer the question first, you would feel that you made the right choice to invest your time in studying while your friends chose other activities, such as playing outside. You were able to answer the corresponding content completely and continuously at the first time because the teacher used the method of calling on the names, eliminating the interference caused by several people scrambling to answer at the same time.

A similar situation exists on PCBs, where multiple signals on different conductors can interfere with each other. When the signals are transmitted to parallel conductors and the corresponding electromagnetic energy is generated, it is called coupling. Coupling between conductors can be good or bad and can be expressed as a ratio between 0 and 1 (or 0% and 100%). For example, bundled conductors or twisted pair cables can be used to achieve a near perfect coupling ratio that supports good signal transmission. Bad coupling or crosstalk usually refers to the interference of undesirable signals due to another conductor distorting or degrading the signal quality of the adjacent conductor.

Let's look at the causes of crosstalk, and then see how Altium Designer can help you minimize the effects of crosstalk on your board.

What causes crosstalk?
Crosstalk is one of the signal integrity issues that PCB designers must deal with. Crosstalk usually occurs when two different signal propagation paths are too close to each other and their respective EM electromagnetic fields extend beyond the space separating the conductors. Crosstalk may be the most important factor affecting high-speed data transmission. It is an unwelcome energy generated by the coupling of one signal to another. According to Maxwell's law, as long as there is current, there will be a magnetic field, and the interference between magnetic fields is the source of crosstalk. This induced signal may cause data transmission loss and transmission errors. Therefore, crosstalk is undoubtedly the most powerful enemy of integrated wiring. Since this interference is undesirable, it can be classified as noise and will cause signal distortion or reduce signal purity.

Component Issues
As electronic products become smaller, the PCBs they contain must also become smaller. However, these size reductions are often matched by demands for greater functionality. To achieve these goals, which may seem to conflict with each other, component packages become smaller but have a greater number of net connections or pin counts. Obviously, this results in tighter spacing between pins, which encourages capacitive coupling. Coupling between pins can occur at connections extending from the component along the surface of the board or from underneath the component for signals to flow through vias.

As routing
takes up more space on the board, more areas are open where crosstalk can occur. This includes at the start and end of pads or routing paths, as well as adjacent paths on the same layer and between layers. Crosstalk at pads is similar to crosstalk between component pins. Along the wire path, interference is often due to inadequate separation of signal paths of similar length at the same angle or single wires with sharp bends. Crosstalk can also occur between routing on different layers when signal layers in the stackup are not adequately isolated by dielectrics.

Crosstalk Cancellation Techniques in Altium Designer
It may seem that crosstalk is an insurmountable obstacle to good signal integrity in a PCB design, especially for small, densely packed, complex boards. It is, of course, a significant design challenge, but there are techniques that can be used to reduce the effects of crosstalk on the operation of your circuits. To take full advantage of these techniques, we first need to be able to analyze our board signals to determine if crosstalk cancellation is necessary. Altium Designer provides the tools to perform signal integrity analysis, as shown in the figure below.

Signal Integrity Analysis Case

Signal integrity analysis in Altium includes the ability to check signal rise times, fall times, provide termination schemes, and perform crosstalk analysis. You can also define models and set rules and constraints and other settings related to signal integrity analysis. Once crosstalk issues are identified, routing paths on the same or adjacent layers can be modified as needed, as described below.

Ensure adequate spacing between routing
In most cases, the cause of crosstalk is insufficient spacing between conductors that are coupled together. Therefore, the best solution or technique to reduce crosstalk is to increase the spacing between two different net routings. This can be done very easily in Altium Designer through the use of highlighting, which allows you to move individual elements and paths or classes at a time. Be sure to follow good PCB layout routing techniques when making changes to routing.

Use Net Classes to Set Routing Spacing

Sometimes
, such as for differential pairs, it is necessary to match the signal paths very well. In these cases, ensuring that the copper weight, trace width, and length of both signals are the same is an important design goal. In contrast, when parallel traces are used for different signals, the important design goal is to minimize their interaction or coupling. If sufficient spacing cannot be selected, one of the traces can be lengthened to minimize the parallel length of the two traces; or one trace can be made perpendicular to the other to reduce crosstalk.

While crosstalk between layers in
a stackup is less common than crosstalk generated on the same layer, interference between adjacent layers in a PCB stackup does occur. The primary cause of this coupling is insufficient isolation of signals due to insufficient insulation between layers. Part of the insulation between adjacent layers is the dielectric material on which the copper layer is etched. Designing a stackup is a simple task in Altium Designer using the Layer Stack Manager dialog. This is shown in the figure below, where you can select the material type, set the board thickness, and define the dielectric constant.

Defining the PCB Stack Using the Layer Stack Manager

As an alternative to using different materials for your stackup, you can insert a ground plane between signal layers. This helps improve isolation and helps provide a shorter ground path for your design.

Crosstalk is a signal integrity issue that can affect PCB functionality almost anywhere two conductors are in close proximity to each other. The best crosstalk mitigation techniques are those that insert spaces or barriers to reduce coupling. Before any of these can be applied, crosstalk must first be identified. Altium Designer provides a versatile signal analysis tool that can be used to diagnose your board's signals and determine the best mitigation techniques to apply.

This post is from PCB Design

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Learned   Details Published on 2019-12-12 09:44
 

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I have never been able to understand why chips are getting smaller and smaller, with more and more pins. The spacing between the pins led out of the chip package is getting smaller and smaller, often exceeding the spacing recommended for board layout. Shouldn't the crosstalk inside the chip or at the chip pin end be very serious?

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Indeed, this is the main problem that IC companies' technology solves. The interconnection density within the chip is getting higher and higher, the clock frequency is getting faster and faster, the number of layers is increasing, the aspect ratio is getting larger, the crosstalk noise is also significantly affected, and the chip power supply voltage is constantly decreasing, which makes the digital circuit noise worse.  Details Published on 2019-12-7 16:55
 
 

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bobde163 posted on 2019-12-7 13:05 I have never figured it out. Nowadays, chips are getting smaller and smaller, and the number of pins is increasing. The spacing between the pins of the chip package is getting smaller and smaller, often exceeding the wiring...

Indeed, this is the main problem that IC company's technology solves.

The density of interconnections within the chip is increasing, the clock frequency is getting faster, the number of layers is increasing, the aspect ratio is increasing, the crosstalk noise has a significant impact,
and the chip power supply voltage is constantly decreasing, making the noise performance of the digital circuit worse.

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Integrated IC, including ultra-large-scale integrated IC wiring, is optimized by professional EDA software. The overall wiring optimizes the network distribution and calculations. The wiring algorithms of specific technologies need to be checked in some books.

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I have been thinking about this question before, and I have also looked for some information, but because of my lack of professional level, I did not understand much of the information I found.  Details Published on 2019-12-9 09:11
 
 
 

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qwqwqw2088 posted on 2019-12-7 16:59 The wiring of integrated IC, including ultra-large-scale integrated IC, is optimized by professional EDA software. The overall wiring optimizes the network distribution and calculation, and the specific technology...

I have been thinking about this question before, and I have also looked for some information, but because of my lack of professional level, I did not understand much of the information I found.

This post is from PCB Design
 
 
 

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Learned

This post is from PCB Design
 
 
 

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