Dry information | What will happen if the CAN bus does not add a terminal resistor?

According to ISO11898-2's regulations on the value of terminal resistors, a 120Ω terminal resistor must be hung at the first and last ends of the bus, that is, a 60Ω terminal resistor is added to the bus, and the intermediate nodes do not need to be hung with terminal resistors, as shown in Figure 1 Show.

Figure 1 Terminal resistor

As shown in Figure 2, if we follow the ISO11898 standard and use CANScope to test, add a 60Ω terminal resistor, and then spontaneously receive data at a baud rate of 250Kbps, we can see that the message can be sent normally and the associated waveform Also normal.

Figure 2 Spontaneous self-collection phenomenon of CANScope with terminal resistor added

If CANScope spontaneously receives data at a baud rate of 250Kbps without adding a terminal resistor, as shown in Figure 3, the data sent are all frame ID errors, and the associated waveforms are also abnormal.

Figure 3 Spontaneous self-collection phenomenon of CANScope without adding terminal resistor

For the message data, we can see from the associated waveform data that there is no problem with the rising edge, but the falling edge is much slower than the waveform with a terminal resistor, and has never reached the recessive state. Why are these? Below we analyze them one by one.

1. Why does it affect the falling edge?

As we all know, the transmission method of the CAN bus is a differential transmission method, and the bus level is judged by the CAN transceiver based on the differential voltage (CANH-CANL) between the CANH and CANL cables. The level signal transmitted on the bus There are only two possibilities, one is the dominant level, and the other is the recessive level, where the dominant level represents logic 0 and the recessive level represents logic 1.

First, let’s take a look at the internal structure of the CAN transceiver, as shown in Figure 4:

Figure 4 Internal structure of CAN transceiver

When the bus level is dominant, Q1 and Q2 inside the transceiver are in the on state, and a voltage difference will occur between CANH and CANL. When the bus level is recessive, Q1 and Q2 inside the transceiver are in the on state. In the cut-off state, CANH and CANL are in a passive state at this time, and the pressure difference is 0.

Therefore, when the recessive state changes to the dominant state (rising edge), it is mainly driven by the driver module in the transceiver. When the dominant state changes to the recessive state (falling edge), it is discharged through the entire bus and the terminal resistor. Produced, so the terminal resistance of the bus is the main physical factor that affects the slowness of the falling edge.

2. Why does the falling edge fail to reach the recessive state?

As mentioned earlier, how the slowness of the falling edge is affected by the terminal resistance is related to the time constant τ. We know that the time constant can be determined by the capacitance (C) and the load resistance (R), that is, τ = RC, so when there is no terminal resistor on the bus, the resistance between CANH and CANL is very large, such as CANScope, when no terminal is added When resisting, the measured resistance value is about 91KΩ. Therefore, according to the time constant formula, the τ value will be very large, so the electric energy on the parasitic capacitance on the bus cannot be quickly consumed, resulting in a slow falling edge and a delay in reaching the hidden value. sexual status.

Figure 5 RC circuit

3. Why does an error frame occur?

As shown in Figure 6, it is a screenshot of the oscilloscope corresponding to Figure 3. It can be seen from the figure that when ΔX in the cursor area is one bit, that is, 4us, the voltage YB of the differential signal at cursor B is 3.341V, which is much higher than CAN The upper limit of recessive level judgment in the specification is 0.5V, and the lower limit of dominant level judgment is 0.9V, so the bit at this time is judged as a dominant bit, and because the time constant is much larger than that at the 250Kbps baud rate bit time, so more than 5 bits will be judged as dominant bits, thus destroying the filling rules in the CAN specification and causing a frame ID filling error.

Figure 6 250Kbps baud rate waveform details

In order to deepen our understanding of the causes of error frames, we give a counterexample to see what happens when the bit time is much larger than the time constant without a terminating resistor.

The following takes CANScope as an example without adding a terminal resistor and performing spontaneous self-receiving at a baud rate of 10Kbps. As shown in Figure 7, no error frames are generated in the CANScope message list.

By observing the synchronized oscilloscope screenshot, as shown in Figure 8, when the cursor area Δ At this time, it can be normally judged that the bit is recessive, which will not lead to the generation of error frames.

When using CANScope as a measurement device, in addition to the user's own method of adding terminal resistors externally, he or she can also add terminal resistors to the node or network under test through software configuration. The method of adding terminal resistors will be selected based on different PORT header accessories. Configuration method.

When using standard accessories P8251T and P1040T, check Enable terminal resistance in Figure 9 to add a 120Ω terminal resistor to the bus; when using StressZ as an optional accessory, such as RHL in Figure 10, you can set the corresponding terminal as needed resistance.

Figure 9 Terminal resistor settings for standard accessories P8251T and P1040T

Figure 10 Optional StressZ terminal resistor setting

Source: ZLG Zhiyuan Electronics

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