Cadence will attend the 2020 Electronic Design Innovation Conference (EDI CON China)
Cadence will attend the 2020 Electronic Design Innovation Conference
EDI CON China 2020
Cadence will attend the 2020 Electronic Design Innovation Conference EDI CON China from October 13th to 14th to showcase innovative 5G communication system solutions and bring speeches from 5G system and radio frequency RF design experts.
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DI CON China 2020 will be held at the National Convention Center in Beijing from October 13th to 14th, 2020.
As a silver sponsor, Cadence will demonstrate complete system simulation, RF design, signal integrity, and power integrity analysis at booth 330. and the latest design services. At the same time, technical experts from Cadence also gave wonderful technical speeches.
EDI CON China (Electronic Design Innovation Conference) is an industry-driven conference and exhibition that provides design engineers and system integrators with the latest RF/Microwave and High-speed digital product and technology information. This annual event provides attendees with hands-on experience with practical design solutions at the semiconductor, module, printed circuit board and system levels.
Cadence completed the acquisition of AWR Corporation in February 2020. AWR Corporation is a wholly owned subsidiary of National Instruments. AWR is a leading provider of high-frequency RF EDA software technology, and its professional RF talent team joined Cadence after the acquisition was completed.
Topic: Building a Power Amplifier Design Box for 5G Applications shelf
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Location:
Conference Room 403
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Time:
October 13, 2020 4:30 PM-5:00 PM
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Speaker:
Zhilong Wan, Lead Application Engineer, AWR Software, Cadence Company
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Speech introduction:
The use of centimeter wave (cmWave) and millimeter wave (mmWave) frequency bands in 5G communications brings new challenges to power amplifier design and performance evaluation. The larger instantaneous bandwidth defined in the new standard also requires more advanced digital predistortion (DPD) algorithms to achieve the required performance. RF/microwave simulation software provides a platform that simplifies the design and analysis of power amplifiers for a variety of applications. This presentation focuses on how to test power amplifier designs using the 5G solution in Visual System Simulator™ (VSS) software within the AWR Design Environment platform (now part of Cadence Design Systems, Inc.). The VSS communications library includes LTE and 5G signal generation and analysis capabilities for uplink and downlink with available carrier aggregation capabilities. The software also provides a test platform that enables users to take their designs and perform standards-compliant simulations, as well as a variety of DPD solutions that can be used to test power amplifier behavior and predict capability correction issues. There will be a number of DPD solutions available so customers can evaluate their designs prior to tapeout.
Topic: Solution with Virtuoso RF Case integration RFIC, RF module design and sign-off process
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Location:
Conference Room 403
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Time:
October 13, 2020 5:00 PM - 5:30 PM
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Speaker:
Dr Milton Lien, AWR Software Application Engineer, Cadence Corporation
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Speech Introduction:
Integrated Passive Devices (IPDs), usually in radio front-end subsystems, are fabricated in silicon, alumina or glass to implement various functional modules such as impedance matching circuits, filters, couplers, baluns and power Combiner/Demultiplexer. These transistorless circuits include discrete, distributed inductive and capacitive elements combined with transmission lines. Electromagnetic (EM) simulation is required to characterize and optimize the performance of these individual structures as well as the entire passive device itself. Silicon substrates in particular present some unique challenges to EM simulators. There are two types of EM simulators commonly used for RFIC chips: full 3D and planar. This talk will present examples of using the Cadence EM simulator, AXIEM 3D planar method of moments (MoM), and Analyst™ 3D finite element method (FEM) as part of the AWR design environment platform to solve EM simulation problems in silicon. In addition, the presentation will focus on integrating AXIEM EM simulation into the Cadence Virtuoso RF platform to characterize passive structures throughout the RFIC and IPD design flow.
Everyone is welcome to participate,
Complete the tasks at the Cadence booth and you will receive exquisite gifts~
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About Cadence
With more than 30 years of expertise in computing software, Cadence is a key leader in the electronic design industry. Based on the company's intelligent system design strategy, Cadence is committed to providing software, hardware and IP products to help electronic design concepts become reality. Cadence's customers are the most innovative companies around the world, delivering products from chips, circuit boards to systems to the most dynamic application markets such as consumer electronics, hyperscale computing, 5G communications, automotive, aerospace, industrial and medical. Excellent electronic products. Cadence has been ranked among Fortune magazine's 100 Best Companies to Work For for six consecutive years. For more information, please visit the company's website at cadence.com.
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