In-depth report from Lanqi Technology: With the advent of the DDR5 generation, performance will usher in a Davis double-click!

Lanqi Technology (688008) is an internationally leading memory interface chip design company. Its excellent management team ensures the iteration efficiency of its products. Founded in 2004, the company is an internationally leading data processing and interconnect chip design company. It mainly designs chips through related IP authorizations such as EDA tools, and then manufactures them by wafer foundry manufacturers. The company is committed to providing high-performance, low-power chip solutions for cloud computing and artificial intelligence, and high-performance memory solutions that fully comply with JEDEC standards for new-generation servers. It is one of the world's major suppliers of complete solutions for memory buffering/semi-buffering from DDR2 to DDR5. The company was selected to the board of directors of the JEDEC Solid State Technology Association, a global microelectronics industry standard setting organization, and is one of the three Chinese companies selected to the JEDEC board of directors. The company is headquartered in Shanghai, with branches in Kunshan, Beijing, Xi'an, Macau, the United States, South Korea and other places. It was listed on the Shanghai Stock Exchange in July 2019.

The founder of the company, Yang Chonghe, has been engaged in chip design and development for many years after completing his doctorate in the United States. He has accumulated rich experience in design, development and management, and has served as vice president of IDT, an American chip design company. IDT is currently one of the main competitors of Montage Technology. In 1997, Dr. Yang Chonghe returned to China and co-founded the Silicon Valley-model integrated circuit design company Xintao Technology with his colleagues, and then sold it to IDT in 2001. Montage Technology was established in 2004. In 2019, Dr. Yang became the first winner of the "Outstanding Management Leadership Award" of JEDEC, the global microelectronics industry standard setting organization. This award is a new award established by the JEDEC organization to recognize the most outstanding senior management in the electronics industry who promote and support the development of JEDEC standards. Mr. Stephen Tai participated in the establishment of Marvell Technology Group and served as the company's engineering and R&D director. After establishing Montage Technology in 2004, he served as the company's director and general manager. He has more than 25 years of experience in semiconductor architecture, design and engineering management. Shan Gang, a former engineer of ZTE and Xintao Technology, has served as design director, application director, and vice president of marketing in the company. The company's stable management team has rich industry experience, which can ensure product R&D efficiency and quickly respond to new market demands.

The company's equity structure is relatively dispersed, and there is no actual controller. Intel, which is the dominant player in the server CPU field, holds 8.99% of the company's equity, and Samsung, which has outstanding performance in the DRAM field, is also a strategic shareholder of the company. The investment of these downstream leading companies will help the company provide better R&D decisions and product positioning, and stabilize the company's market position.

Figure 1: Capital structure of Lanqi Technology

Among the circulating shareholders as of the third quarter reporting period of 2021, the proportion of holdings by northbound funds is extremely high, and there is little change in the company's holdings by institutions. The company has a high level of financial attention.

Figure 2: Shareholdings of the top ten circulating shareholders in the third quarter of 2021

Horizontal exploration of the industry, rich product matrix

On the basis of ensuring the market share of memory interface chips, the industry has made horizontal efforts to explore and enrich the product matrix to ensure the continuous release of future performance. The company mainly develops a new generation of memory interface chips, Jintai® CPU and hybrid security memory modules to ensure faster computing power of servers, stronger external data throughput and better scalability. At present, the company has two main product lines: interconnect chip product line and Jintai server platform products.

Interconnect chips mainly include: memory interface chips, memory module supporting chips, and PCIe Retimer chips.

The memory interface chip is the core logic chip of the server memory module. It is only used in server memory bars and is not suitable for ordinary PCs and mobile phones. Its main function is to improve the speed and stability of memory data access. Memory interface chips need to be matched with various memory particles and memory modules produced by memory manufacturers, and need to pass the comprehensive and strict certification of their functions and performance by server CPU, memory and OEM manufacturers before they can enter the large-scale commercial stage. Therefore, overcoming the core technical difficulties of memory interfaces and crossing the high entry threshold of the server ecosystem have built a strong industrial barrier for the company. The memory interface chip industry has a very high degree of concentration. IDT, Lanqi Technology, and Rambus are the only three companies in the world that have this technology. As of the reporting period of the 2021 semi-annual report, Lanqi Technology's memory interface market share reached 47%.

With the development of generations, server performance has made a qualitative leap, but the area of ​​the motherboard has not changed much. In order to enable the CPU to read data more efficiently in a limited space, the memory interface chip needs to ensure the voltage, frequency, timing and other original parameters, so as to improve the speed and stability of memory data access. The memory interface chip responds to the development of the server memory industry and is updated. As the memory is upgraded from DDR2 and DDR3 to DDR4, the data transmission rate has also been promoted from 800MT/s and 1600MT/s to 3200MT/s, and the operating voltage has also developed from 1.8V and 1.5V to the current industry's lowest voltage of 1.2V. Due to the signal integrity issues of the server memory subsystem at high speed, large capacity and low power consumption, the memory interface chip also needs to be continuously upgraded.

Figure 3 Basic information of DDR products of different generations

The DDR4 fully buffered "1+9" architecture developed by the company has broken through the centralized architecture design of DDR2 and DDR3, and has been adopted as the standard design of the DDR4 generation. It has also been the first to obtain Intel's certification. At present, memory interface chips have successfully entered the international mainstream memory, server and cloud computing fields. DDR4 memory interface chips can be divided into two categories according to their functions: 1. Register buffer (RCD), which is used to buffer the address, command, and control signals from the memory controller. 2. Data buffer (DB), which is used to buffer the data model from the memory controller or memory particles. Memory modules that only use RCD chips for buffering are usually called RDIMMs (registered dual in-line memory modules), and memory modules that use RCD and DB chips for buffering are called LRDIMMs (load-reduced dual in-line memory modules). In the DDR4 era, there are only three companies that provide similar products, of which Rambus only has the ability to design RCD chips, and only IDT and Lanqi can provide DB chips.

Figure 4 Schematic diagram of the company's DDR4RDIMM/LRDIMM

There are four sub-generations in the DDR4 generation: Gen1.0, Gen1.5, Gen2.0, and Gen2plus. During the life cycle of each sub-generation, the product price will gradually decrease, but the price of the new sub-generation products will rise again due to the improvement of technology and performance.

Figure 5: The company's DDR4 memory interface chip sub-generation products and applications:

The next-generation mainstream memory product DDR5 is about to be commercialized on a large scale, and the company's supporting modules are about to enter mass production. In terms of DDR5 memory research and development, SK Hynix officially announced the development of the next-generation DDR5 DRAM memory in November 2018, Samsung announced the development of the first 8GB LPDDR5 DRAM chip in July 2018, and Micron's DDR5 memory samples were officially mass-produced and launched in 2019. DDR5 is the next development direction of server main memory. The main focus of this version is to increase the density and bandwidth of RAM while reducing its power consumption.

According to the JEDEC standard, in addition to memory particles and possible memory interface chips, DDR5 memory modules may also require three supporting chips, namely serial detection hub (SPD), temperature sensor (TS) and power management chip (PMIC). The company and its partners have done supporting research and development, which can provide customers with one-stop comprehensive solutions and effectively expand the market capacity of the company's marketable products. The first-generation DDR5 memory interface chips independently developed by Lanqi Technology, including RCD chips, DB chips and module supporting chips, have been sent to customers for feedback and final optimization. It is expected to officially enter the mass production ramp-up stage before the end of 2021.

Figure 6 Overview of DDR5 supporting chips

PCIe Retimer chips help customers quickly introduce designs, and the market response is excellent. With the development of fields such as big data, artificial intelligence, and cloud computing, the demand for data interaction within servers is also increasing. PCIe Retimer chips have become one of the important components of high-speed circuits. Such chips use advanced signal conditioning technology to compensate for channel losses and eliminate the influence of various jitter sources. They have solved the problems of uneven signal timing, large losses, and poor integrity when data is transmitted at high speed and over long distances in data centers. They are currently widely used in high-performance computing, servers, storage, and other fields. The company is the only mainland supplier of Retimers. The market size is mainly driven by major market demand. At present, PCIe 4.0 Retimer chips have been successfully mass-produced, supporting the industry's mainstream packaging, and key performance indicators such as power consumption and transmission delay have reached international advanced levels. The chip is currently used in typical scenarios such as NVMe SSDs, AI servers, and Riser cards. At the same time, the company provides comprehensive technical support services such as reference design solutions, evaluation boards, and supporting software based on this chip to help customers quickly complete the introduction of designs and shorten the chip launch cycle.