BiRen Technology benchmarks the international cutting-edge artificial intelligence chips

Recently, BiRen Technology's first general-purpose GPU, BR100, was officially delivered and started tape-out. The series of general-purpose computing products equipped with this chip mainly focus on many computing application scenarios such as artificial intelligence training and reasoning, general computing, etc., and will make up for the huge computing power gap brought about by the rapid development of artificial intelligence applications.

In the current multi-chip cluster parallel computing field, the industry generally uses collective communication schemes to implement data sharing and data transmission operations between multiple nodes. In the current collective communication, the process of "chip A on node 1 sends data to chip B on node 2" is divided into four steps. First, chip A on node 1 sends the data to the system memory of node 1. Then a network request is sent to the network card, which reads the data from the system memory and sends it to the network card of node 2. After that, the network card of node 2 receives the data and stores it in the system memory. Finally, chip B reads the data from the system memory. Further optimizing the performance of collective communication is one of the many technical topics in this field.

To this end, BiRen Technology applied for an invention patent entitled "Artificial Intelligence Chip and Its Operation Method" (application number: 202120655700.4) on June 11, 2021, and the applicant is Shanghai BiRen Intelligent Technology Co., Ltd.

Figure 1. Schematic diagram of the circuit block of an artificial intelligence chip

FIG1 is a circuit block diagram of an artificial intelligence chip proposed in the present invention. The artificial intelligence chip 200 can be connected to a network card 30 via a bus 40. According to the actual design, the bus is a high-speed peripheral component interconnect bus or other buses. The chip can receive a data string from the network card.

The artificial intelligence chip includes a processing circuit 210 and a chip memory 220, and the processing circuit is coupled to the chip memory. Specifically, the processing circuit can receive a command carrying first data and a logical address provided by the network card. When the processing circuit determines that the logical address points to the first address space, the processing circuit can determine which of the multiple segments in the first address space the logical address points to, and then determine the data category and/or operation category corresponding to the command. In addition, the processing circuit can determine the physical address of the chip memory by determining the offset in the corresponding segment of the first address space pointed to by the logical address. Furthermore, the processing circuit can also read the physical address of the chip memory according to the logical address to obtain the second data when the first data is not stored in the chip memory. After the processing circuit generates a calculation result based on the first data and the second data, the calculation result is written into the physical address of the chip memory according to the logical address.

In this way, when receiving a command, the artificial intelligence chip can determine the data category and/or operation category corresponding to the command according to the logical address. Therefore, when the first data is not written, the first data and the second data can be operated according to the data category and/or operation category, and the operation result can be written into the chip memory.

In short, BiRen Technology's AI chip patent effectively reduces the operation delay of the AI ​​chip by reducing the number of read and write times to the chip memory, and improves compatibility, enabling collective communication to be carried out more efficiently.

BiRen Technology is committed to developing original general computing systems, establishing efficient software and hardware platforms, and providing integrated solutions in the field of intelligent computing. Adhering to the dream of "China's core", the BiRen team has been working towards the goal of benchmarking the most advanced international products, starting from the underlying architecture and achieving complete originality in a short period of time.