USilicon Technologies: Open source accelerates collaborative development of RISC-V software and hardware

From June 25 to 26, the fifth Jiwei Semiconductor Summit with the theme of "The Heart and the Core are in the Same Form, Changes are Like Kunpeng" was officially held in Haicang, Xiamen. At the EDA/IP special forum on the 26th, Wang Luye, general manager of USilicon Technology, delivered a keynote speech entitled "Open Source Accelerates RISC-V Software and Hardware Collaborative Development".

In recent years, the industry has reached a growing consensus that RISC-V is expected to form a three-legged situation with x86 and ARM architectures. RISC-V is also seen as a new opportunity to promote the development of China's integrated circuit industry. At present, the domestic open source ecosystem has made great progress.

Wang Luye quoted the Institute of Computing Technology of the Chinese Academy of Sciences as saying that building an open source chip ecosystem requires active investment in four elements, including: open instruction set, open source IP and SoC design; open source EDA tool chain; low-cost chip development and verification platform and system software that can quickly adapt to chips.

Since its inception, USi Technology has been committed to evolving the RISC-V high-computing micro-architecture starting from the Linux minimum system. In the field of open source software, USi Technology joined the openEuler community on April 5, 2021, and worked with global developers to build an ecosystem. The Lishan FPGA development board equipped with WH64 single-core and dual-core processor cores successfully ran the openEuler operating system on May 15 and May 25, respectively. USi Technology plans to complete the porting and adaptation of the openEuler operating system based on the self-developed "Ganjiang" reference design chip by the end of this year.

Looking ahead to the open source community chip reference design plan for the next three years, Wang Luye revealed that USi Technology will launch the "Ganjiang" series of quad-core application processors with a 28nm process and a main frequency of 1.5GHz in 2021; and launch the "Moye" series of high-performance single-board computers in 2022, using a 14nm process and a main frequency of 2.4GHz. In 2023, the "Xuanyuan" series, which uses a 7nm process and uses CPU and eFPGA as computing units and can be used for data acceleration cards, will be launched. Provide software ecological support and processor core iteration traction for partners in vertical application fields including aerospace, scientific research and education, industry and automobiles, communication networks and smart hardware.

It is worth mentioning that USi Technology will participate in the joint development of the Xiangshan open source processor. It is understood that Xiangshan is a domestic open source high-performance RISC-V processor jointly developed by the Chinese Academy of Sciences, the Institute of Computing Technology, and the Pengcheng Laboratory through the China Open Instruction Ecological Alliance and industry companies. The second phase of the Xiangshan project will be jointly developed with Microcore Technology, ByteDance, ESWIN, USi Technology and other companies.