Introduction and implementation of Verilog method for quantization in H.264/AVC

0 Introduction

H.264 is a new generation of video compression standard, which was jointly developed by the video coding expert group of ITU-T and the MPEG (Moving Picture Coding Experts Group) of ISO/IEC. Its excellent compression performance will also play an important role in digital TV broadcasting, real-time video communication, network video streaming and multimedia communication.

In terms of core technology, H.264/AVC adopts various effective technologies, such as unified VLC symbol coding, motion estimation with 1/4 pixel accuracy, multi-mode motion estimation, integer transform based on 4×4 blocks, layered coding syntax, etc. Due to the use of integer transform, floating point numbers will not appear in the calculation, and the accuracy is high. These measures make the H.264 algorithm have a very high coding efficiency. In terms of quantization, the quantization step size is 52, and the quantization will be mainly analyzed below. Here, the Verilog implementation of quantization is proposed, taking the transformed data as input and the quantized code stream as output to achieve the purpose of quantization.

1. Introduction to Quantitative Functions

The sampled pulse signal is discrete in time, but still continuous in amplitude and space, that is, it can take infinite values, which requires rounding to change its possible amplitude from infinite to finite. This process of changing the signal amplitude from a continuous quantity to a discrete quantity is called quantization.

Without reducing the visual effect, the quantization process can reduce the image coding length and reduce unnecessary information in visual restoration. H.264 uses scalar quantization technology to map each image sample code into a smaller value. The principle of a general scalar quantizer is:

Where: y is the input sample point code; QP is the quantization step size; FQ is the quantization value of y; round() is the integer function (whose output is the nearest integer to the input real number).

2 Introduction to Quantization Algorithms

In H.264, there are 52 values ​​for the quantization step size Qstep. As shown in Table 1. Among them, QP is the quantization parameter, which is the serial number of the quantization step size. When QP takes the minimum value of 0, it represents the finest quantization; when QP takes the maximum value of 51, it represents the coarsest quantization. Every time QP increases by 6, Qstep increases by 1. When applied, you can flexibly choose according to actual needs within this wider quantization step size range. For chroma coding, the same quantization step size as luminance coding is generally used. In order to avoid color quantization artifacts at higher quantization steps, the current H.264 draft limits the maximum value of chroma QP to approximately 80% of the maximum value of luminance QP. The final H.264 draft stipulates that the maximum value of luminance QP is 51; the maximum value of chroma QP is 39.

In H.264, the quantization process operates on the result of DCT:

Where: Yij is the conversion coefficient in matrix Y; Zij is the output quantization coefficient; Qstep is the quantization step size.

The H.264 quantization process also needs to complete the "Ef" multiplication operation in the DCT transform, which can be expressed as:

Where: Wij is the conversion coefficient in the matrix W; PF is the element in the matrix EF. The values ​​are shown in Table 2 according to the position (i, j) of the sample point in the image.

By using the property that the quantization step increases by 1 times every time the quantization parameter increases by 6, the calculation can be further simplified, namely:

Where: floor() is the rounding function (its output is not greater than the maximum integer of the input real number). Formula (3) can be written as:

In this way, MF can be an integer. Table 3 shows the MF values ​​corresponding to QP values ​​of 0 to 5. For QP values ​​greater than 5, only the qbits value increases by 1 with each increase of 6 in the QP value, while the corresponding MF value remains unchanged. In this way, the quantization process is an integer operation, which can avoid the use of division and ensure that the data is processed with a 16-bit algorithm. The minimum operation complexity is achieved without deteriorating the PSNR performance, as shown in Table 3.

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The specific quantization process is as follows:

Where: "》" is a right shift operation, and one right shift completes integer division by 2; sign() is a sign function; and f is an offset. The role of f is to improve the visual effect of the restored image, such as taking 2qbits/3 for intra-frame prediction image blocks and 2qbits/6 for inter-frame prediction image blocks.

3 Specific Implementation

In this paper, Verilog language is used to implement H.264 quantization; Modelsim is used for simulation; QuartusⅡ is used for synthesis.

According to Verilog programming, Modelsim simulation is shown in Figure 1.

The input matrix is ​​[140, -1, -6, 7, -19, -39, 7, -92, 22, 17, 8, 31, -27, -32, -59, -21], and the final quantization result is [17, 0, -1, 0, -1, -2, 0, -5, 3, 1, 1, 2, -2, -1, -5, -1]. It can be seen that this is consistent with the result given by Iain EGRichardson. The development board used is the third generation development board of Red Hurricane, and the FPGA chip is Altra EP2C35F484C8. It can be seen from the report after synthesis that the resources consumed are less than 1%, as shown in Figure 2. The RTL diagram after synthesis is shown in Figure 3.

4 Conclusion

The quantization algorithm of H.264 is introduced, and the simulation is performed with Modelsim. The results are completely consistent with the theory. The resource consumption on the FPGA development board is analyzed. It can be seen that the quantization of H.264 can be fully realized with FPGA.