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Playing with Zynq Serial 39——[ex58] XADC acquisition control example based on Zynq [Copy link]

This post was last edited by ove learning makes me happy on 2020-2-19 09:43

1. Function Overview

The XADC ( Xilinx Analog-to-Digital Converter ) module unique to Xilinx FPGA devices innovatively integrates analog signal processing into FPGA devices, making it easier to collect and process board-level analog signals and monitor board-level temperature and power supply voltage.

The XADC function is shown in the figure. It has a dedicated temperature sensor and power supply sensor inside to monitor the working status of the FPGA device itself. It also provides 1 independent analog voltage input channel ( VP_0/VN_0 ) and 16 multiplexed analog voltage input channels ( VAUXP/VAUXN ). The two internal ADCs have a 12-bit bit width and a 1MSPS sampling rate. They can be connected to an external precision reference voltage source as a reference voltage, which can basically meet general applications. In addition, there is also a dedicated control interface that can be interconnected with the FPGA logic for easy programming control. The voltage input range of the power supply voltage monitoring is 0~3V , and the voltage input range of the analog voltage input channel is 0~1V .

Figure XADC functional block diagram

To integrate the XADC function, you need to instantiate the XADC IP core, then access the XADC internal registers to set the analog voltage acquisition mode and read the converted analog voltage data. The mapping of the XADC internal registers is shown in the figure.

Figure 1. Screenshot of XADC internal register mapping relationship

In Zynq , the XADC module is connected to the PS via the AXI GP bus . XADC is equivalent to being repackaged as a standard AXI bus peripheral, and its register mapping relationship has also changed. The remapped register addresses can be seen in the Xilinx official document pg091-xadc-wiz.pdf .

Regarding the application of XADC of Zynq , I recommend you to refer to the following three documents of Xilinx .

  • pg091-xadc-wiz.pdf
  • ug480_7Series_XADC.pdf
  • Chapter 30 XADC Interface of ug585-Zynq-7000-TRM.pdf

This example project corresponds to zstar_ex58 . In terms of hardware, XADC is connected to PS through AXI interface ; PS is programmed to read the temperature and supply voltage value inside XADC , and the final temperature and voltage value of the conversion is printed regularly through UART .

2 Voltage conversion relationship

Analog voltage value conversion

For 1 independent analog voltage input channel ( VP_0/VN_0 ) and 16 multiplexed analog voltage input channels ( VAUXP/VAUXN ), its input range is 0~1V , and the reference voltage is 1V . Therefore, the conversion relationship between the data it reads and the actual voltage value is as follows:

For a 12-bit ADC value , Vactual = Vdigital/4096

For a 16-bit ADC value , Vactual = Vdigital/65536

Temperature conversion

The temperature value read from the XADC temperature sensor can be converted to the actual Celsius temperature using the following formula:

For a 12-bit ADC value , Tactual = Tdigital*503.975/4096 – 273.15

For a 16-bit ADC value , Tactual = Tdigital*503.975/65536 – 273.15

Conversion formula for supply voltage

For the supply voltage value read by the power supply sensor in XADC , the range is 0~3V , and the reference voltage is 3V . Therefore, the conversion relationship between the read value and the actual voltage is as follows:

For a 12-bit ADC value , Vactual = Vdigital*3/4096

For a 16-bit ADC value , Vactual = Vdigital*3/65536

3 XADC IP Addition and Configuration

Based on the zstar_ex56 project example, let's see how to add and configure the XADC IP . Right-click on a blank area of the Diagram page of Block Design , as shown in the figure, and click Add IP… .

After Search , enter the keyword XADC , and the XADC Wizard IP will appear . Double-click to add this IP to the Diagram .

As in the previous operation, enter the keyword axi interconnect and add the AXI Interconnect IP to the Diagram .

The two newly added IP modules are shown in the figure. XADC needs no further explanation, you know it. The purpose of this AXI Interconnect is to convert the s_axi_lite interface of XADC to the AXI GP interface ( AXI3 ) of Zynq , which is equivalent to an interface adapter module.

Double-click the axi_interconnect_0 component. In the pop-up property menu, change the Number of Slave Interfaces and Number of Master Interfaces to 1 , as shown in the figure .

Double-click the xadc_wiz_0 component and modify the properties in the pop-up menu as follows.

Select AXI4Lite in Interface Options to connect to Zynq via AXI Interconnect .

Select Continuous Mode for Timing Mode .

Startup Channel Selection Check Channel Sequencer .

Input clock frequency ( DCLK Frequency ) input 100MHz .

● ADC Conversion Rate : Enter 1000KSPS , which is the highest rate supported.

Use the default settings for other options.

The ADC Setup page configuration is shown in the figure.

  • Select Continuous Mode for Sequencer Mode , which means continuous acquisition of ADC channels.
  • Channel Averaging selects 16 , which means that the XADC performs an average filter on 16 consecutive sample values before outputting them.
  • Use the default settings for other options.

The Alarms page is shown in the figure. Here you can check the voltage channels that need to be monitored and set the alarm threshold value.

On the Channel Sequencer page, you need to check TEMPERATURE , VCCINT , VCCAUX , VCCBRAM , VCCPINT , VCCPAUX , VCCDDRO , and VP/VN to enable the ADC conversion function of these channels.

After completing the configuration of XADC , connect the three modules axi_interconnect_0 , xadc_wiz_0 and processing_system7_0 as shown in the figure. Note that Vp_Vn is the external input pin of XADC and needs to be brought out. If the 16 multiplexed channels of XADC are used , they also need to be brought out to the top-level module for pin declaration and manually configure the pin number.

In the Address Editor , click Auto Assign Address and confirm that xadc_wiz_0 has been assigned the corresponding address space as shown in the figure.

After completing the configuration and generating a new PS system, update the interfaces of the top-level module, mainly several new interfaces related to XADC , make corresponding connections (refer to the project source code), and then recompile the entire Vivado project.

4Embedded Software Programming

Refer to the document "Playing with Zynq- Tools: Exporting PS Hardware Configuration and Creating a New SDK Project.pdf " to export the PS hardware project, and open EDK to create a new HelloWorld template project.

Re-edit the helloworld.c source code as follows. After the system is initialized ( init_platform ), the temperature sampling value of XADC is read and converted into the actual temperature value for printing, the VCCINT sampling value of XADC is read and converted into the actual voltage value for printing, the VCCAUX sampling value of XADC is read and converted into the actual voltage value for printing, the VP/VN sampling value of XADC is read and converted into the actual voltage value for printing, and the VBRAM sampling value of XADC is read and converted into the actual voltage value for printing. The reading and printing operation is performed every 5 seconds .

#include <stdio.h>

#include "platform.h"

#include "xil_printf.h"

#include "sleep.h"

#include "xil_io.h"

#define XPAR_AXI_GP0_BASEADDR 0x43c00000

#define XPAR_XADC_TEMPERATURE 0x200

#define XPAR_XADC_VCCINT 0x204

#define XPAR_XADC_VCCAUX 0x208

#define XPAR_XADC_VPVN 0x20c

#define XPAR_XADC_VBRAM 0x218

int main()

{

u32 temp;

float voltage;

init_platform();

printf("XADC TEST\n\r");

while(1)

{

printf("\n\r");

temp = Xil_In32(XPAR_AXI_GP0_BASEADDR + XPAR_XADC_TEMPERATURE);

temp = temp*503.975/65535 - 273.15;

printf("Temperature is %d degree\n\r",temp);

voltage = Xil_In32(XPAR_AXI_GP0_BASEADDR + XPAR_XADC_VCCINT);

voltage = voltage/65536*3;

printf("VCCINT is %f\n\r",voltage);

voltage = Xil_In32(XPAR_AXI_GP0_BASEADDR + XPAR_XADC_VCCAUX);

voltage = voltage/65536*3;

printf("VCCAUX is %f\n\r",voltage);

voltage = Xil_In32(XPAR_AXI_GP0_BASEADDR + XPAR_XADC_VPVN);

voltage = voltage/65536;

printf("VPVN is %f\n\r",voltage);

voltage = Xil_In32(XPAR_AXI_GP0_BASEADDR + XPAR_XADC_VBRAM);

voltage = voltage/65536*3;

printf("VBRAM is %f\n\r",voltage);

sleep(5);

}

cleanup_platform();

return 0;

}

5. Board-level debugging

On the Zstar board, set jumper cap P3 to JTAG mode, that is, short-circuit PIN2-3 .

Connect the serial cable ( USB cable connects the USB port of PC and the UART interface of Zstar board ) and Xilinx download cable (downloader connects the USB port of PC and the JTAG socket of Zstar board ). Use 5V power supply to power the board.

Then refer to "Playing with Zynq- Tools: SDK Online Running Naked Program.pdf " to burn the zstar.bit file and helloworld.elf file into Zynq and run it.

Open Putty and set up the serial port. You can see that the current temperature and voltage values sampled are continuously printed every 5 seconds as shown in the figure. The temperature sensor is inside the FPGA device, so the sampled Temperature value reaches 52°C .




This content is originally created by EEWORLD forum user ove . If you want to reprint or use it for commercial purposes, you must obtain the author's consent and indicate the source.

This post is from FPGA/CPLD
 

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