Xilinx Launches SmartLynq+ for Versal ACAP, Making It Smarter and More Flexible

As we enter the era of heterogeneous computing, where different processing engines within a single application take us to the next level of performance and efficiency, debug and trace tools must keep pace with the devices.

Recently, Xilinx has added a new product to its portfolio of programming, debugging and tracing modules. The SmartLynq+ module is a high-speed debugging and tracing module, mainly for designs using the Versal™ platform, which greatly improves configuration and tracing speeds. The SmartLynq+ module provides up to 28 times faster Linux download time than the SmartLynq data cable through the high-speed debug port (HSDP). For trace capture, the SmartLynq+ module is capable of running at up to 10Gb/s via HSDP. This is 100 times faster than standard JTAG! Faster iterations and repeated downloads can increase development productivity and reduce design cycles. This means that you no longer need to spend valuable time on debugging, but can focus on starting up Versal-based solutions.

Versal is the industry's first adaptive compute acceleration platform (ACAP), a revolutionary new heterogeneous computing device that far exceeds the capabilities of traditional CPUs, GPUs and FPGAs.

ACAP is a highly integrated multi-core heterogeneous computing platform that can be changed at any time at both the software and hardware levels to dynamically adapt to a wide range of applications and workloads in data centers, automotive, 5G wireless, wired, and defense. The architecture of Versal ACAP is software programmable from the beginning and has a highly flexible network-on-chip (NoC) with a transmission rate of up to several megabits per second. The NoC seamlessly integrates all engines and key interfaces, allowing the platform to use all resources of the platform at startup and making it easy for software developers, data scientists, and hardware developers to program. Through a series of tools, software, libraries, IP, middleware, and firmware, ACAP allows users to develop a variety of customized accelerated computing solutions at any time through industry-standard design processes.

SmartLynq+ modules offer the following benefits:

Ultra-fast download speeds to maximize development productivity for faster iterations

High-speed tracing with enhanced visibility and up to 14GB of trace memory for execution history

Full visibility into heterogeneous architectures, deep debug of hard IP and intelligent engines (AI and DSP), adaptive engines, and scalar engines in Versal ACAPs

Debugging of all time-dependent subsystems

Flexible smart debugging platform with features such as smart filtering and software programmable built-in debugger

Shareable debugging platform with unified view for remote multi-user environments

Packed with breakthrough performance and intelligent features, SmartLynq+ modules are the smartest and most flexible debug products on the market.

The main functions and interfaces of SmartLynq+ modules are:

Host-side USB 3.0 connector, Gigabit Ethernet connection to network for remote access

High-Speed ​​Debug Port (HSDP) for faster programming, debugging, and high-speed serial trace

JTAG (PC4 header) provides speeds up to 100MHz

8-bit general-purpose I/O (GPIO) port for various basic input/output operations on the target board

Mictor-38 connector for parallel tracking

The SmartLynq+ module comes with accessories including a power supply, USB and Ethernet cables, a micro-SD card, and JTAG and GPIO wire cables. Users download the latest SD card image, follow the steps to set up the module, and then develop with the Versal ACAP.

Users can easily experience the power of HSDP firsthand using SmartLynq+ modules with the now available Versal AI Core Series VCK190 Evaluation Kit and Versal Prime Series VMK180 Evaluation Kit!