Silexica has announced a new distribution partnership with Beijing Jingwei Hirain, a leading Tier 1 solution provider for the Chinese automotive market, to expand the distribution channel for SLX FPGA, a tool that accelerates the conversion process from C/C++ to FPGAs and ASICs.
Greg Cole, Silexica's Global Sales Director, said: "We are excited about the collaboration between Silexica and Hirain as it aligns with our growth plans in creating global availability and local support for our customers. Hirain's in-depth knowledge of EDA tools and strong local support in China provide us with the best solution to accelerate the introduction from C/C++ to hardware."
The agreement, which took effect recently, authorizes Hirain to sell Silexica's SLX FPGA in the Chinese market. Through Hirain's sales channels in China, Silexica will be able to strengthen its business and customer support in China. The agreement further reaffirms the two companies' willingness to drive growth and build customer relationships in the Chinese market.
"At Hirain, we are constantly improving and developing new solutions to enhance our customers' processes and success," said Ji Yingcun, CEO of Hirain Technologies. "We believe Hirain's SLX is an innovative and unique technology that perfectly complements our growing portfolio and supports our customers in converting C/C++ code to FPGAs better and faster."
Hirain Technologies and Silexica are collaborating to promote next-generation automotive solutions using Xilinx chips. Xilinx is a leading global supplier of programmable logic devices for the automotive market, with a variety of innovative solutions for infotainment, driver assistance and driver information systems.
Willard Tu, senior director of Xilinx's automotive business unit, said: "The Chinese automotive market is growing rapidly as autonomous driving and electrification are at the forefront of growth. The combination of Hirain's technical expertise and Silexica's tool suite will further promote the application of Xilinx automotive chip solutions in China."
Overcoming High-Level Synthesis Challenges with SLX-FPGA
The HLS methodology represents challenges that must be considered and overcome during the design process. SLX FPGA addresses challenges associated with the HLS design flow, including non-synthesizable C/C++ code, non-hardware-aware C/C++ code, application parallelism detection, and PrimMA insertion locations to help engineers prepare and optimize C/C++ code for HLS.
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