Discussion on the Electromagnetic Compatibility of DSP

Since the first digital signal processor ( DSP ) 　　chip was introduced in the early 1980s , DSP has brought great opportunities for the development of digital signal processing with its unique characteristics of stability, repeatability, large-scale integration, especially programmability and easy adaptive processing. It has a wide range of applications. However, since DSP is a rather complex, diverse and multi-system digital and analog hybrid system, the interference from external electromagnetic radiation and interference between internal components, subsystems and transmission channels on DSP and its data information has seriously threatened its stability, reliability and safety [1]. According to statistics, DSP accidents caused by interference account for about 90% of its total accidents. At the same time, DSP inevitably radiates electromagnetic waves to the outside, causing interference, obstruction or damage to human bodies and equipment in the environment. In addition, with the improvement of DSP computing speed, the signal bandwidth that can be processed in real time has also greatly increased, and its research focus has also shifted to high-speed and real-time applications. However, it is precisely because of this that its electromagnetic compatibility problem has become increasingly prominent. This paper discusses the electromagnetic compatibility problem of DSP .

2 Electromagnetic compatibility　　of DSP hardware

　　Electromagnetic compatibility (EMC) includes two aspects: the emission and sensitivity of the system. If the interference cannot be completely eliminated, it should be reduced to a minimum. If a DSP system meets the following three conditions, the system is electromagnetically compatible. (1) It does not interfere with other systems; (2) It is not sensitive to the emission of other systems; (3) It does not interfere with the system itself.

　　2.1 Main sources of interference in DSP

　　Electromagnetic interference is generated through conductors or through radiation. Many electromagnetic emission sources, such as lighting, relays, DC motors, and fluorescent lamps, can cause interference. AC power lines, interconnect cables, metal cables, and internal circuits of subsystems can also generate radiation or receive unwanted signals. In high-speed digital circuits, clock circuits are usually the largest source of broadband noise. In fast DSP systems, these circuits can generate harmonic distortion signals up to 300MHz, which should be removed from the system. In digital circuits, the most vulnerable are reset lines, interrupt lines, and control lines.

　　2.2 Conducted Interference in DSP

　　One of the most obvious propagation paths for circuit noise is through conductors. A wire passing through a noisy environment can pick up noise and send it to another circuit, causing interference. Designers must avoid wires picking up noise, such as noise entering the circuit through the power line. If the power supply itself or other circuits connected to the power supply are the source of interference, the power line must be decoupled before it enters the circuit.

　　2.3 Common Impedance Coupling Problem in DSP

　　Common impedance coupling occurs when currents from two different circuits flow through a common impedance. The voltage drop across the impedance is determined by the two circuits. The ground currents from the two circuits flow through the common ground impedance, the ground potential of circuit 1 is modulated by ground current 2, and noise signals or DC offsets are coupled from circuit 2 to circuit 1 through the common ground impedance.

　　2.4 Radiation Coupling Problems in DSP

　　The coupling generated by radiation is generally called crosstalk. Crosstalk is caused by the electromagnetic field generated when current flows through a conductor, which induces transient currents in adjacent conductors.

　　2.5 Radiation Phenomenon in DSP

　　There are two basic types of radiation: differential (DM) and common mode (CM). Common mode radiation, or monopole antenna radiation, is caused by an unintentional voltage drop that raises all ground connections in the circuit above the system ground potential. CM radiation is a more serious problem than DM radiation in terms of electric field magnitude. To minimize CM radiation, the common mode current must be reduced to zero using practical design.

2.6 Factors　　affecting EMC

　　(1) Voltage: A higher supply voltage means a larger voltage swing and more emissions, while a low supply voltage affects sensitivity.

　　(2) Frequency: High-frequency signals and periodic signals will generate more radiation. In high-frequency digital systems, current spikes will be generated when the device is in a switching state; in analog systems, current spikes will also be generated when the load current changes.

　　(3) Grounding: In circuit design, nothing is more important than using a reliable and perfect ground connection method. Among all EMC problems, most of them are caused by improper grounding. There are three signal grounding methods: single-point, multi-point and mixed. Single-point grounding can be used when the frequency is lower than 1MHz; in high-frequency applications, multi-point grounding is best; mixed grounding is a combination of single-point grounding for low frequency and multi-point grounding for high frequency. However, the ground loops of high-frequency digital circuits and low-level analog circuits must not be mixed.

　　(4) PCB design: Proper printed circuit board (PCB) layout is essential to prevent electromagnetic interference.

　　(5) Power supply decoupling: When the device switches, transient currents are generated on the power line, which must be attenuated and filtered out. Transient currents from high di/dt sources cause ground and trace "emission" voltages. High di/dt generates a large range of high-frequency currents, which excite components and cables to radiate. The current changes and inductance flowing through the wires will cause voltage drops. Reducing the inductance or the change in current over time can minimize the voltage drop.

　　2.7 DSP hardware noise reduction technology

　　2.7.1 Noise reduction technology in board structure and circuit arrangement

　　(1) Use ground and power planes; (2) The plane area should be large to provide low impedance for power decoupling; (3) Keep surface conductors to a minimum; (4) Use narrow lines (4 to 8 mils) to increase high-frequency damping and reduce capacitive coupling; (5) Separate digital, analog, receiver, and transmitter ground/power lines; (6) Separate circuits on the PCB according to frequency and type; (7) Do not cut the PCB, as traces near the cut may cause unwanted loops; (8) Using a stacked structure is the best preventive measure for most signal integrity and EMC problems. It can effectively control impedance, and its internal routing can form an easy-to-understand and predictable transmission line structure. And the traces between the power supply and the ground layer should be sealed; (9) Keep the spacing between adjacent excitation traces larger than the width of the traces to minimize crosstalk; (10) The clock signal loop area should be as small as possible; (11) High-speed lines and clock signal lines should be short and directly connected; (12) Sensitive traces should not be parallel to traces that transmit high-current fast switching conversion signals; (13) There should be no floating digital inputs to prevent unnecessary switching conversions and noise generation; (14) Avoid power supply under crystal oscillators and other inherently noisy circuits (15) The corresponding power, ground, signal and return traces should be laid in parallel to eliminate noise; (16) The clock line, bus and chip enable terminal should be separated from the input/output lines and connectors; (17) The routing clock signal and I/O signal should be in an orthogonal position; (18) To minimize crosstalk, the traces should be crossed at right angles and the ground wires should be scattered; (19) Protect critical traces (use 4 mil to 8 mil traces to minimize inductance, the route should be close to the floor layer, the sandwich structure should be between the board layers, and there should be ground on each side of the protection sandwich).

　　2.7.2 Noise reduction method using filtering technology

　　(1) Filter the power lines and all signals entering the PCB, and use high-frequency, low-inductance ceramic capacitors (0.1 mF for 14 MHz and 0.01 mF for more than 15 MHz) for decoupling at each point pin of the IC; (2) Bypass all power supply and reference voltage pins of the analog circuit; (3) Bypass fast switching devices; (4) Decouple the power supply/ground at the device leads; (5) Use multi-stage filtering to attenuate multi-band power supply noise; (6) Install the crystal oscillator embedded in the board and ground it; (7) Add shielding where appropriate; (8) Arrange adjacent ground lines close to signal lines to more effectively prevent the emergence of new electric fields; (9) Place the decoupling line driver and receiver appropriately close to the actual I/O interface, which can reduce the coupling between the PCB and other circuits and reduce radiation and sensitivity; (10) Shield and twist the interfering leads together to eliminate mutual coupling on the PCB; (11) Add clamping diodes to inductive loads.

　　3  Measures to be taken in DSP software design

　　Software interference mainly manifests itself in the following aspects: (1) Incorrect algorithms produce wrong results. The main reason is that the program exponential operation in the computer processor is an approximate calculation, and the results produced sometimes have large errors, which are prone to malfunctions; (2) Due to the low accuracy of the computer, the addition and subtraction operations must be correct, and the large number "eats up" the small number, resulting in error accumulation, leading to underflow, which is also one of the sources of noise; (3) Computer problems caused by hardware interference include: changes in the program counter PC value, increased data acquisition errors, control state failure, changes in RAM data due to interference, and system "deadlock".

　　3.1 Using the method of intercepting out-of-control programs

　　(1) Single-byte instructions should be used more often during program design, and some no-operation instructions should be inserted at key points, or valid single-byte instructions should be repeated several times. This can protect the subsequent instructions from being disassembled and keep the program running on the right track; (2) Add software traps: When the PC value gets out of control and causes the program to get out of control, the CPU enters the non-program area. At this time, a boot instruction can be used to force the program to enter the initial entry state and enter the program area. A trap can be set every few steps; (3) Software reset: When the program "goes astray", the monitoring system is run to automatically reset the system and reinitialize it.

　　3.2 Establishing a sign to judge

　　Define a unit as a flag, set the value of the unit to a characteristic value in the main program of the module, and then determine whether the value of the unit remains unchanged at the end of the main program. If it is different, it means there is an error, and the program will enter the error handling subroutine.

　　3.3 Add data security backup

　　Important data is stored in more than two storage areas, and a large-capacity external RAM can be used to back up the data. Permanent data is stored in tables in EPROM, which can prevent data and tables from being damaged and ensure that data is not run as instructions when the program logic is confused.

　　4 Several key factors to pay attention to when designing with EDA tools

　　The design of high-speed digital circuits requires the experience of designers on the one hand, and the support of excellent EDA tools on the other hand. EDA software has become multifunctional and intelligent. With the application of high-density single chips, high-density connectors, micro-hole built-in technology and 3D boards in printed circuit board design, layout and wiring have become more and more integrated and have become an important part of the design process. Software technologies such as automatic layout and free-angle wiring have gradually become an important method to solve such highly integrated problems. Such software can design manufacturable circuit boards within a specified time frame. At present, due to the shorter and shorter time to market, manual wiring is extremely time-consuming and can no longer meet the requirements. Therefore, layout and wiring tools are now required to have automatic wiring functions to quickly respond to the higher requirements of the market for product design.

　　4.1 Automatic Routing Technology

　　Due to the need to consider high-density design factors such as electromagnetic compatibility (EMC) and electromagnetic interference, crosstalk, signal delay and differential pair wiring, the constraints of layout and routing are increasing every year. A few years ago, a general circuit board only needed 6 differential pairs for wiring, but now it needs 600 pairs. It is impossible to rely solely on manual wiring to achieve these 600 pairs of wiring within a certain period of time, so automatic wiring tools are indispensable. Although the number of nodes (nets) in today's design has not changed much compared to a few years ago, only the complexity of silicon chips has increased, but the proportion of important nodes in the design has greatly increased. Of course, for some particularly important nodes, the layout and routing tools are required to be able to distinguish them, but there is no need to restrict each pin or node.

　　4.2 Things to note when using free angle wiring technology

　　As the number of integrated functions on a single chip increases, the number of output pins has also greatly increased, but the package size has not expanded accordingly. Coupled with the limitations of pin spacing and impedance factors, such devices must use finer line widths. At the same time, the overall reduction in product size means that the space used for layout and routing has also been greatly reduced. In some DSP products, the size of the baseboard is almost the same as the size of the device on it, and the components occupy up to 80% of the board area. Some high-density components have staggered pins, and even tools with 45° routing functions cannot be automatically routed. The free-angle routing tool has great flexibility and can maximize the routing density; its pull-Tight function automatically shortens each node after routing to meet space requirements; it can greatly reduce signal delays while reducing the number of parallel paths, helping to avoid crosstalk. Using free-angle routing technology can make the design manufacturable and the designed circuit performance is good.

　　4.3 Technologies to be used for high-density devices

　　The latest high-density system-level chips use BGA or COB packaging, and the pin spacing is getting smaller and smaller. The ball spacing has been as low as 1mm and will continue to decrease. This makes it impossible to use traditional wiring tools to lead out the signal lines of the package. There are currently two ways to solve this problem: (1) lead the signal line from the lower layer through the hole under the ball; (2) use ultra-fine wiring and free-angle wiring to find a lead channel in the ball grid array. For high-density devices, the use of extremely small width and space wiring is the only feasible method, because only in this way can a high yield be guaranteed. Modern wiring technology also requires the ability to automatically apply these constraints. The free wiring method can reduce the number of wiring layers and reduce product costs. It also means that some ground layers and power layers can be added to improve signal integrity and EMC performance while keeping the cost unchanged.

　　4.4 Adopt other new circuit board design and production technologies

　　The application of micro-hole plasma etching technology in the multi-layer board process in DSP has greatly improved the performance of layout and routing tools. The application of plasma etching to add a new hole within the path width will not lead to an increase in the base plate itself and the manufacturing cost, because the cost of making a thousand holes by plasma etching is as low as the cost of making one hole. This requires greater flexibility in routing tools, which must be able to apply different constraints and adapt to the requirements of different micro-holes and construction technologies. The increasing density of components has also had an impact on layout design. The layout and routing tools always assume that there is enough space on the board for the component release machine to release the surface to install new components without affecting the existing components on the board. However, the sequential placement of components will cause such a problem, that is, every time a new component is placed, the optimal position of each component on the board will change. This is why the layout design process has a low degree of automation and a high degree of manual intervention. Although the current layout tools have no restrictions on the number of components to be laid out in sequence, some technicians believe that the layout tools are actually limited when used for sequential layout, and this limit is about 500 components. Some technicians believe that when there are as many as 4,000 components placed on a board, it will cause big problems. Compared with sequential algorithm technology, parallel layout technology can achieve better automatic layout results.

　　4.5 3D Layout Tools

　　3D tools are mainly used for layout and routing of special-shaped and fixed-shaped boards, which are becoming increasingly popular. For example, Zuken's latest tool Freedom uses a three-dimensional baseboard model to perform spatial layout of components and then two-dimensional routing. The routing process can also tell whether the board is manufacturable. Routing tools must also be able to handle the design method of using shadow differential pairs on two different layers, because this design method has become increasingly important. As signal frequencies continue to increase, tools that integrate layout and routing tools with advanced simulation tools for virtual prototypes have appeared, such as Zuken's Hot Stage tool. Therefore, routing issues can be considered even in the virtual prototype stage. We believe that new software technologies such as free-angle routing, automatic layout and 3D layout will become common design tools for baseboard designers, just like automatic routing technology. Designers can use these new tools to solve new technical problems such as electromagnetic compatibility in microvias and monolithic high-density integrated systems.

　　5 Conclusion

　　The frequency range of electromagnetic compatibility technology is as wide as 0 to 400 GHz. In addition to traditional facilities, the research objects range from chip level to various types of ships, space shuttles, intercontinental missiles, and even the electromagnetic environment of the entire earth. Electromagnetic compatibility technology is also an important issue to be considered in DSP system design. Appropriate noise reduction technology should be used to make the DSP system meet EMC standards. Its electromagnetic compatibility is a key research area with distinctive characteristics. Many countries have not only strengthened their own research in this area, but also established international organizations to facilitate exchanges and unified standards.