Research on image focusing system based on FPGA

Publisher:梦想学院Latest update time:2011-09-24 Source: 互联网Keywords:FPGA Reading articles on mobile phones Scan QR code
Read articles on your mobile phone anytime, anywhere
Abstract: An automatic focusing method based on image technology is adopted. The quality of the image is analyzed according to the image, and the image preprocessing and clarity judgment are completed to obtain the current imaging status. The focusing operation is completed by controlling the motor . The core technology is to analyze the image quality * price function. In view of the large amount of calculation and complex calculation of the focusing algorithm, the image preprocessing method of median filtering and grayscale linear transformation is adopted, and the working mode of pipeline operation, "ping-pong" operation, dual butterfly processor multiplexing, and radix-2FFT algorithm are combined. The experimental results show that this method solves the speed problem of complex system control of the automatic focusing algorithm.

The automatic focusing method based on image technology is completely different from the traditional automatic focusing technology. It directly uses image processing technology on the captured image, analyzes the image quality, obtains the current focus state of the system, and then adjusts the focal length of the imaging system lens through the driving mechanism to realize the automatic focusing process.

1 Focusing Algorithm Analysis

Whether an image is focused is reflected in the spatial domain by whether the edges and details of the image are clear, and the edge and detail information of the image can be obtained by differentiating the image. Therefore, the information is used as the criterion for focusing. This function that extracts the edge information of the image is called the focus value function, and the value obtained after the image is processed by it can reflect the clarity of the image.

The focusing*valence function should have the following characteristics: unbiasedness, unimodality, high sensitivity, high signal-to-noise ratio, and small amount of calculation.


Therefore, the key to achieve self-focusing by image processing is to find an ideal basis for image clarity value, so the core algorithm of this system is the image clarity value function implementation algorithm and the focusing implementation algorithm. In the image clarity algorithm, the image is mainly processed in three parts: image preprocessing, clarity value algorithm, and motor control algorithm.

Converting images from the spatial domain to the frequency domain for analysis is a common method of image processing. At the same time, since a clear image contains more image information and details than a blurred image, after analysis, it is found that the edge information of an image with higher clarity is clearly discernible, which corresponds to the high-frequency component of the image after Fourier transform is enhanced and the low-frequency component is reduced, while the blurred image has an increase in low-frequency component and a decrease in high-frequency component. In this way, the theoretical basis of the image clarity * valence function based on the power spectrum is generated.


For a continuous image f(x, y), its two-dimensional Fourier transform can be calculated when


For digital images, if we consider sampling f(x, y) in the x and y directions with sampling intervals △x, △y, then f(x0+m/M, y0+n/N)=f(m, n), M, N are the number of pixels in the horizontal and vertical directions (△x=I/M, △y=, I/N), m, n=0, ±1, ±2…

Assuming the above formula is periodic, we get


Since a clearly focused image has clearly discernible edge information, the image contains more high-frequency components. From the energy point of view, the increase in high-frequency components of the image means the increase in signal energy. In this way, the energy power spectrum function can be used to construct the image clarity function.


Among them, Pl(u, v) is the power spectrum function of the image, and L is the serial number of the image.

The difference between various clarity evaluation functions lies in the determination of the amount of high-frequency components of the image. Here, the method of weighting the high-frequency components of the image is adopted. At the same time, its weighting coefficient conforms to such a rule: as the frequency increases, its value also increases, which can reflect the amount of high-frequency components in the image. In the actual processing process, the distance from the pixel to the center pixel is used. Formula (4) is the value parameter that can reflect the image after weighting each high-frequency component in the spectrum of the image. Figure 3 is the comparison result of the clarity evaluation function based on the power spectrum described in C language and other methods. It can be seen from the figure that the image clarity evaluation function based on the power spectrum has a better judgment ability.


2 System Block Diagram

The block diagram of the FPGA-based automatic focusing system is shown in Figure 4. The image preprocessing process, the algorithm implementation process of the clarity * value function, and the algorithm implementation and focusing process of the motor control are all implemented in the FPGA and processed in real time. The module contains 5 modules and 3 parts, which are the input end, processing process and output end. SDRM and Flash chips are added in the processing process . The input and output use the DVI interface , which are TFP401 input DVI chip and TFP410 output DVI chip respectively . The FPGA core processing chip uses the Cycl ON e3EP3-C5F256C8N chip, which contains 100,000 logic gates, and 2 IS4232400 chips are used to provide buffering for image data.


From formula (4), it can be seen that for a 640×480 grayscale image, 1,228,800 multiplication operations, 307,200 square root operations, and 400 addition operations are required. Since the amount of calculation is particularly large and the changes in each image are not large, this system divides the image into 5 modules of 128×64 size. First, the 28×64 grayscale image is Fourier transformed, and then the power spectrum of the image is obtained. Then, the signal value is weighted to obtain the clarity value of a piece of the image instead of the clarity value of the entire image. At the same time, the "ping-pong" operation, dual butterfly processor multiplexing, and FPGA implementation of the radix 2FFT algorithm are adopted.

3 Focusing effect analysis

The analysis of the clarity*value algorithm and the multiplication implementation structure based on 2-FFT shows that the number of multiplication calculations of the clarity*value algorithm for this image is (53 248×3+64×32×3)=165 888 times, and the number of addition calculations required is (53 248×3+64×32×2-1)=163 839 times. From these data, it can be seen that the system delay during the focusing process is mainly the addition of the delays calculated in these two aspects, and there is also the delay of the circuit system, but this delay has been considered when designing the circuit and is limited to the minimum range. The "ping-pong" operation delay is used to add a delay of about 0.000 ls. When the system main frequency is 60 MHz, after the actual test system, the total delay is about 0.05s, and the acquisition time interval of 8 frames of images in the real-time processing system is required to be ×0.04=0.32s.

To meet the real-time requirements, the debugging of the above system is implemented in the Cyclone3EP3C5F256C8N chip, and the effect is quite satisfactory.

The focal length adjustment range of the lens is set to 60 segments, and the focus segment value range is [1, 60]. During the test, a group of images sent from the farthest end of the focal length are processed, and the search step number K is obtained to obtain the position that should be focused each time and the image clarity* value, as shown in Table 1. The position is where the image focusing effect is clearest.


4 Conclusion

The input port of this module directly inputs DVI signals, not a direct image acquisition port. In practical applications, the entire focusing process needs to be completed, a control circuit module for controlling the motor needs to be added, and the real-time performance of the entire focusing process needs to be comprehensively evaluated. In addition, an important application prospect of the automatic focusing method based on image technology is integration with C MOS image sensors . Since CMOS image sensors and FPGAs use the same manufacturing process, they can be integrated. After the CMOS image sensor is integrated with the automatic focusing function, it can not only simplify the design of the automatic focusing part of the imaging system, but also improve its competitiveness with CCD image sensors .


Keywords:FPGA Reference address:Research on image focusing system based on FPGA

Previous article:Power consumption in FPGA design
Next article:Software and Hardware Design of Ozone Power Supply Control System Based on CPLD

Recommended ReadingLatest update time:2024-11-16 22:35

Research and Application of FPGA Parallel Digital Serial Transmission and Interface Technology
1 Introduction After more than ten years of rapid development at home and abroad with hardware, system and application design as the main content, the development of FPGA technology in modern information processing and control technology has begun to rise. Obviously, a series of modern info
[Embedded]
Research and Application of FPGA Parallel Digital Serial Transmission and Interface Technology
Design and implementation of a solar tracker based on FPGA
0 Introduction Solar energy is a clean, pollution-free energy source that is inexhaustible and has broad development prospects. However, solar energy is intermittent and has uncertain intensity and direction, which makes it difficult to collect solar energy. The use of a solar tracking device can keep the s
[Embedded]
Design and implementation of a solar tracker based on FPGA
Application of Embedded Logic Analyzer in FPGA Timing Matching Design
introduction As FPGA devices continue to grow in size and packaging density, the use of traditional logic analyzers in FPGA board-level debugging is becoming increasingly difficult. To this end, mainstream FPGA manufacturers have added embedded logic analyzer (ELA) IP soft cores t
[Test Measurement]
Design of a simple digital storage oscilloscope based on single chip microcomputer and FPGA
1 Introduction   Compared with traditional analog oscilloscopes, digital storage oscilloscopes not only have the advantages of waveform storage, small size, low power consumption, and easy use, but also have powerful real-time signal processing and analysis functions. In the field of electronic measurement, digital st
[Test Measurement]
Design of a simple digital storage oscilloscope based on single chip microcomputer and FPGA
Design and implementation of remote monitoring system based on FPGA+DSP
  The purpose and main research content of the project   Research purposes   In order to remotely manage equipment and monitor the environment on site, simplify on-site monitoring equipment, and effectively improve the stability and security of the entire system, a remote controller is planned to be developed, referre
[Embedded]
Design and implementation of remote monitoring system based on FPGA+DSP
Design and verification of logic chip function test system using FPGA chip
In the most primitive testing process, the testing of integrated circuits (ICs) relied on experienced testers using instruments such as signal generators, multimeters, and oscilloscopes. This testing method has low testing efficiency and cannot achieve large-scale and large-volume testing. With the continuous increase
[Test Measurement]
Design and verification of logic chip function test system using FPGA chip
Design of a Simple Digital Storage Oscilloscope Based on FPGA
0 Introduction The development of high-speed digital acquisition technology and FPGA technology has had a profound impact on traditional test instruments. Digital storage oscilloscope (DSO) is a comprehensive product of analog oscilloscope technology, digital measurement technology, and computer technology. It is ma
[Test Measurement]
Design of a Simple Digital Storage Oscilloscope Based on FPGA
Strengthening the collaborative ecosystem: SoC FPGA becomes a powerful weapon
Altera intends to gradually strengthen FPGA co-processors through more advanced process technology and closer industry cooperation, significantly improve the overall performance of SoC FPGA, and create greater differentiation advantages for seizing the embedded system market. As the penetration rate of SoC FPGA in the
[Analog Electronics]
Strengthening the collaborative ecosystem: SoC FPGA becomes a powerful weapon
Latest Embedded Articles
Change More Related Popular Components

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号