Renesas Electronics Announces New Automotive-Grade SoC Processor Technology

According to foreign media reports, Renesas Electronics, a major supplier of advanced semiconductor solutions, announced that it will develop automotive-grade system-on-chip (SoCs) processor technology for advanced driver assistance systems (ADAS) and autonomous driving (AD) system applications, aiming to optimize performance and power efficiency while supporting a high level of functional safety.

The development results announced by Renesas this time are as follows: 1) Convolutional neural network (CNN) hardware accelerator core, which can simultaneously provide 60.4 trillion operations per second (TOPS) of deep learning performance and 13.8 TOPS / W of power efficiency; 2) Advanced safety mechanisms that can quickly detect and respond to random hardware faults, and can create high-power efficiency detection mechanisms with high fault detection rates. 3) New mechanisms that enable software tasks with different safety levels to run in parallel on the SoC without interfering with each other, greatly enhancing functional safety and meeting ASIL D requirements. The above technologies have been applied to Renesas' latest R-Car V3U automotive-grade SoC.

(Image source: Renesas)

Applications such as the next-generation ADAS and AD systems are extremely demanding, requiring not only 60 trillion operations per second (TOPS) or 120 TOPS of deep learning performance, but also energy efficiency. Since most of the work of AD systems is processing a large number of signals from target recognition to issuing control commands, it is difficult to achieve functional safety of ASIL D (the highest safety level in the ISO 26262 automotive safety standard). Renesas has developed new technologies to meet these needs, such as hardware accelerators that provide excellent CNN processing performance and energy efficiency.

The following are the latest technologies used in the R-Car V3U SoC:

1. Energy-efficient, high-performance convolutional neural network (CNN) hardware accelerator

As the number of sensors used in the new generation of ADAS and AD systems continues to increase, CNN processing performance also needs to be continuously enhanced. By reducing the heat generated by power consumption, an air-cooled electronic control unit (ECU) can be installed, thereby reducing weight and reducing costs. Renesas Electronics has currently developed a CNN hardware accelerator core with excellent deep learning performance, and has configured three accelerator cores for the R-Car V3U with high density. Each CNN accelerator core has 2 MB of dedicated memory, which reduces data transfer between external dynamic random access memory (DRAM) and CNN accelerator (more than 90%), and achieves high CNN processing performance of 60.4 TOPS, as well as best-in-class power efficiency of 13.8 TOPS/W.

2. ASIL D system safety mechanism with self-diagnosis capability

The ISO 26262 automotive functional safety standard is a numerical target (indicator) for various functional safety levels. The highest functional safety level, ASIL D, requires a single point fault metric (SPFM) of more than 99% and a latent fault metric (LFM) of more than 90%, thus requiring an extremely high random hardware fault detection rate. In addition, due to the continuous development of advanced vehicle operating systems, such as the new generation of ADAS and AD systems, the overall functionality of automotive-grade SoCs basically meets the ASIL D standard.

Renesas has also developed safety mechanisms for rapid detection and response to random hardware failures that occur throughout the SoC. By combining safety mechanisms that are appropriate for specific target functions, power consumption can be reduced while improving fault detection rates. By integrating these mechanisms into the R-Car V3U, most of the SoC's signal processing can meet ASIL D standards and have self-diagnosis capabilities, reducing the complexity of fault-tolerant design in AD systems.

3. Support mechanism to prevent software tasks from interfering with each other (FFI)

Freedom from interference (FFI) between software tasks is an important factor in meeting functional safety standards. When there are software components with different safety levels in the system, it is particularly important to prevent lower-level tasks from affecting higher-level tasks and causing failures. In addition, it is also very important to ensure FFI in the SoC when accessing control registers in hardware modules and shared memory. Therefore, Renesas Electronics has developed an FFI support mechanism that monitors all data flowing through the interconnect in the SoC and prevents unauthorized access between tasks. In this way, all tasks executed on the SoC can implement FFI, thereby achieving ASIL D standard applications, which can manage object recognition, integrate sensors with radar/LiDAR, plan routes, and issue control instructions through a single chip.