Narrow frequency shift digital discriminator circuit detects differential GPS correction signals

The differential correction signal is sent to the GPS signal (DGPS) through a low-frequency (285~325kHz) transmitter, and the transmission data rate is 100bps or 200bps. This modulation is minimum shift keying (MSK), which produces a pseudo frequency shift keying (FSK) with a carrier offset of half the bit rate. For a 100bps signal, the carrier offset is only ±25Hz. For a receiver IF frequency of 1kHz, the IF signal offset is between 975~1025 Hz. The corresponding time of the two sets of data is 1026μs and 976μs respectively. The initial work on detecting the modulated signal focused on the phase-locked loop and analog discriminator, but how to optimize or adjust for each rate?

The US Coast Guard sends a differential correction signal to the GPS signal (DGPS) via a low-frequency (285~325kHz) transmitter. The transmission data rate is 100bps or 200bps. The modulation is minimum shift keying (MSK), which produces a pseudo frequency shift keying (FSK) with a carrier offset of half the bit rate. For a 100bps signal, the carrier offset is only ±25Hz. For a receiver IF frequency of 1kHz, the IF signal offset is between 975~1,025Hz. The corresponding time of the two sets of data is 1,026μs and 976μs respectively.

Initial efforts to detect modulated signals focused on phase-locked loops and analog discriminators, both of which needed to be optimized or adjusted for each rate. The effects of component aging were also considered. This led to the development of a 5V CMOS circuit digital method for measuring the length of each cycle of the IF signal. This circuit works well when the peak-to-peak value of the AC-coupled IF signal is between 2V and 15V.

The IF input signal is clamped using a CD4049 CMOS hexadecimal buffer/converter (see figure). The CD4049 is followed by a CD4013 D-type flip-flop set as an inverting flip-flop to eliminate any hysteresis. The positive and negative parts of the signal are processed separately, and the negative signal of the square wave selects a 1000-bit counter, which is fed with a 1MHz clock.

The IF frequency discriminator measures the length of each cycle of the IF input signal. This circuit can detect the modulation signal of the GPS signal using a differential correction mechanism.

If the signal duration exceeds 1,000 μs, an overflow pulse is generated; if it is shorter than 1,000 μs, it is not. Similarly, the duration of the IF square wave positive signal can be measured by another CD4059. The outputs of the two CD4059s are fed into an OR gate to mix the measured values ​​of each data IF signal period.

Any overflow pulse will trigger the re-triggerable monostable multivibrator CD4098. The output pulse width is 1.1 ms, which is slightly larger than the IF center frequency period, ensuring that the output pulse will not drop to 0 between adjacent IF signal long duration periods.

The reset command of the CD4059 used as a programmable divider is complex. If the control inputs Kb and Kc are set to 0, the counter is reset to the blocking input.

Since we want the first stage of the counter to divide by 10, we have Ka = 1, Kb = 1, and Kc = 0. Kc is always 0, so reset is controlled by Kb. After the master reset, there will be an additional count. Therefore, if the blocking input is 1,000, the output pulse will occur after 1,001 counts. If this does not work, the blocking input may be set to 999 to get a total delay of 1,000μs.

Because the CD4059 is a synchronous programmable counter, the output pulse is a single clock cycle (1.0 μs). If a blocking input of 1,000 is used, pulses with a width less than 999 μs will not generate an output pulse, and pulses with a width greater than 1,002 μs will generate continuous pulses.

The detected data pulse length is very close to a multiple of 10ms, with a maximum error of only 0.1ms. When the oscilloscope is triggered on the rising edge of the data pulse, the IF signal is a pure sine wave of 975Hz. When the oscilloscope is triggered on the falling edge, the original IF signal is a pure sine wave of 1,025Hz. Because the circuit functions as an IF frequency discriminator, the detection scheme is independent of the transmission data rate.