The device is designed for PCIe and features per-lane electrical idle and receiver detection. The technology optimizes data transfer rates for PCIe Gen3 (8.0GT/s) and Gen2 (5.0GT/s), while also handling GenI (2.5GT/s).
The MAX14950 is available in a small, lead-free, 42-pin (3.5mm x 9.0mm) TQFN package for optimal layout and minimal space requirements. The device operates over the 0°C to +70°C temperature range.
Key Features
Optimize the compatibility between Gen3 (8.0GT/s) and Gen2 (5.0GT/s) and Gen1 (2.5GT/s)
Receiving the test license is completely transparent and the software operates freely
Balanced permits up to 30 inches of FR4 placement
Compatible input/output return loss of PCIe Gen3 (8.0GT/s)
Electrical Idle Detection
Very low latency: 160ps (typical) propagation delay
Random jitter ≤1.5psRMS (max)
Deterministic jitter ≤10.5psP-P (typical)
Four levels of programmable input equalization
Eight-level programmable output emphasis
On-chip 50Ω input/output termination
+3.3 V single supply operation
±5kV Human Body Model (HBM) protection on all pins
Space saving: 3.5 x 9.0 mm TQFN package
PCIe Gen2 Redriver/Equalizer Pin-Compatible with MAX4950
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