IP Design Specifications in the 2021 Standard for Very Large Scale Integrated Circuit (VLSI) Design Flow

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IP Design Specifications in the 2021 Standard for Very Large Scale Integrated Circuit (VLSI) Design Flow [Copy link]

In the modern semiconductor industry, VLSI design methods based on IP (intellectual property) are a development trend, which is very important for enhancing the production capacity of VLSI chips. The design results based on IP cores are largely reusable logic function modules and layout designs, and IP with verification functions is also called VIP.

In this article, we will introduce the design life cycle in VLSI chip design.

In the design of very large-scale integrated circuit (chip) products, design engineers widely use a module called semiconductor intellectual property (IP) core to speed up the design and market launch process.

There are multiple aspects of IP usage. In VLSI, IP is created or adopted depending on the role of the design engineer. First let us understand why we need IP in VLSI design, its brief history, what are the different IP cores, what are the different IPs that can be adopted in a design, their life cycle and their usage across the semiconductor industry.

Through this article, you will learn in detail the difference between hard IP and soft IP cores and their life cycle.

Introduction to IP Design in VLSI

If we go back to the early 1970s, standard cells were considered reusable modules in VLSI design, just like IP today. You can also say that the first IP design started with standard cells. These standard cells followed fixed-height row cells and standard placement and routing algorithms. The main purpose of using standard cells was to automate the design process of ASICs through these standard cells.

Of course, the design cost does increase compared to the manufacturing cost. To this end, the cost relationship between design and manufacturing can be balanced by optimizing the low-cost, reusable standard cell design process.

In today's semiconductor industry, we already have all IP modules from standard cells to I/O cells and processors (CPU). On the other hand, the requirements for VLSI chip design engineers are still increasing dramatically, including more complex integration levels. For example, we expect VLSI IC chips to work as systems such as system-on-chip (SOC).

IP Design Requirements in VLSI

1. Designing a SOC (System on Chip) depends mainly on the ability of the VLSI architect, who must have the ability to select and optimally combine various components and arrange them reasonably on the chip.

2. It is very important to consider these open standard components and they must be developed by excellent IP suppliers in the market (for example, they should be able to provide standard instruction sets).

3. Planning and designing a manufacturable IP core is not an easy task. A designer may not necessarily have the ability to design low-level standard IP, or he must prioritize design efficiency and must use existing standard reusable IP cores. On the other hand, even if he can design an IP core, he may still face a series of legal issues and possible patent conflicts.

4. Usually, when chip technology develops very fast, the current generation of VLSI chips will become the IP core of the next generation. Therefore, in VLSI design, the design of IP core is crucial in the VLSI semiconductor world to advance and keep up with the pace of chip technology advancement.

5. The current semiconductor industry expects chip designers to design chips with one or more CPUs plus cache to achieve various application requirements of the chip. It is very important to use reusable IP modules in the design instead of starting from scratch every time to shorten the time to market.

6. Multi-core processors (such as Qualcomm's octa-core CPU) enter the market and dominate the IC and microprocessor space. This situation makes more sense if the processor is replicated on the chip itself.

In today's world, IP cores dominate chip design because we are currently manufacturing very advanced multi-core processors. We now have the ability to integrate billions of transistors on a single chip. The chip design process has become very advanced and automated through the use of various VLSI design tools, so it does not make any sense to start from scratch without using IP design.

The role of IP design providers in semiconductor devices

We know that IP design is needed in the design of today's VLSI semiconductor integrated chips and integrated devices, relying on IP as a reusable building block in the overall product design.

However, it is time-consuming and inconsistent with industry standards for each company to create its own IP, which also makes us not have to consider the overall design requirements and system application scenarios.

1. IP providers offer customized IP services and IP verification services, making our chip design tasks easier.

2. They are responsible for determining whether the IP core we need uses a standard, reusable module, such as an SPI interface, an ASIC macro, or a custom ADC.

3. In VLSI design, IP vendors have design engineers with rich expertise and complete industry experience who can help realize the required chip requirements to realize a complete chip product.

4. IP Services also provide the resources and silicon expertise required to create IP by using various EDA tools to analyze, simulate and verify the validity of IP designs.

IP core design status in various industries

In VLSI design, IP can be created in various areas of the semiconductor industry to speed up the overall design process.

Some example IP modules that are being expanded to other industries include

High Resolution Temperature Sensor IP Block

IP blocks required for biomedical sensors.

In analog fields such as SAR-ADC successive approximation, analog-to-digital converters use IP modules. Multiple designs such as pipeline ADCs and digital-to-analog converters (DACs) will include IP cores.

IP used in voltage circuits such as voltage references and voltage regulators.

IP used in real-time clock circuits, radio frequency identification (RFID) circuits, and IoT components.

Key VLSI players use IP to develop custom standard cell libraries, current mode logic (CML) for high-speed applications, and various CMOS,

Reused in LVDS and ECL I/O cells.

IP design results provided by IP suppliers or IP core developers

In order to effectively use IP design in system-level design, IP vendors need to provide all the detailed information, such as

IP core data table

Simulation SPICE Netlist of IP

IP Behavior Model

Will deliver IP's .lib, .lef and other timing models

Final IP design in GDS2 format for integration.

At the same time, CDL (Circuit Design Language) is provided for LVS verification.

All deliverables will be fully tested and characterized by the IP provider.

Types of IP Design in VLSI

It is very important to design a SOC (System on Chip) in a short time or within the expected reasonable time. Since the competition in this industry is very fierce, if the time to market is long, the designed chip will be of no use.

Therefore, it is impossible to manually design all the components of SOC, otherwise it is impossible to complete the chip manufacturing task on time. Therefore, in VLSI chip design, IP design is always preferred to improve productivity and shorten time to market.

Any IP module is pre-designed and well-tested, so it can be effectively reused in many systems. IP core design can be divided into two different types:

Hard IP Core

Soft IP Core

Hard IP core design

A hard IP core is nothing more than a pre-designed layout. Since the complete pre-designed layout is available from the beginning, parameters such as IP block size, IP power consumption, and IP performance can be accurately measured.

Gate-level IP components, standard cells are the best examples of hard IP.

Hard IP cores are fixed in design and must be matched to a specific manufacturing process route. If the process needs to be changed, the IP also needs to be redesigned. Therefore, hard IP cores need to meet all electrical and physical process standards of a specific process technology route.

For example, if an electrical standard states that an IP core must be able to drive a specific load at a set delay time, the specifications of the hard IP core should closely match that standard.

An important fact is that the supplier sells qualified hard core IP for a specific process (ensuring the functionality and performance of the IP), and also obtains the corresponding license from the manufacturer. In this process, the IP supplier will set some generally applicable rules for the qualification review process of a specific process, including,

Manufacturing hard IP in a specific process technology route, and

Testing requirements for main VLSI chips.

Design of soft IP core

Soft IP cores are modules written and synthesized in HDL (Hardware Description Language), which can be VHDL, Verilog or some other advanced HDL. The advantage of soft IP cores over hard IP is that soft IP can be adapted to newly developed chip process technology nodes. The disadvantage of soft IP over hard IP is that soft IP does not run as fast as hard IP and its size is also larger than that of hard IP cores.

At present, the most widely used and largest number of CPU and logic circuit modules can only be provided in the form of soft IP cores. Correctly adopting logic function synthesis technology and reasonably using EDA tools to design layout and routing will help design soft IP cores that meet the requirements.

On the other hand, the design cost and design time of soft IP cores are generally greater than those of hard IP cores.

These are simple synthesizable IP blocks that vendors will tag to keep track of because they can be easily stolen by anyone.

IP Core Design Life Cycle

IP Core Design Life Cycle in VLSI Chip Design

The main difference between the IP design model and conventional custom VLSI chip design is that IP (Intellectual Property) is designed before it is used. After the first IP block or specification is determined, it takes several years and several generations of technology evolution to design the IP.

The above figure shows the IP design life cycle in the VLSI industry, which is mainly divided into two parts.

IP Core Creation

Use of IP Core

IP Core Creation Process

The IP creation phase includes the determination of the IP module requirements specification. The IP module involves all conventional design processes, such as the writing of hardware description language (Verilog or VHDL) code. At each stage of the IP design process, the testing process becomes increasingly important because the IP core needs to be used repeatedly.

IP Requirements Specification

To start creating an IP (Intellectual Property) core design in VLSI, a set of appropriate requirement specifications must be given. Usually, the specification sheet is prepared by the VLSI chip integration design or overall designer and then handed over to the IP developer or provider who cooperates with him.

The specification sheet should usually include the following points,

You should decide whether to design hard IP or soft IP.

IP logic function blocks that you want to reuse throughout your design.

The overall performance specifications of the IP must be determined in advance.

The total power consumption of the IP.

The process technology route that the IP standard should meet, etc.

IP Design Methodology - Hardware Description Language (HDL)

After deciding on the block design, we need to choose a design methodology that can meet the required specifications. Generally, hardware description language (HDL) code needs to be written, not only for the IP block itself, but also for comprehensive testing (characterization and verification) to verify that the required functionality meets the requirements.

IP Core Design Documentation

These IP cores are designed to be used by others, so detailed documentation at every stage of the design life cycle is very important. Vendors providing IP cores must standardize their documentation format and its content.

IP (Intellectual Property) Database

Various EDA tools require a variety of data formats to be provided as input to operate properly. Therefore, it is crucial to clearly understand the need for databases during the IP design lifecycle.

The information entered into the IP module database includes the corresponding module information and description. Thereafter, the database becomes one of the materials that the IP core supplier should deliver.

IP Core Characterization

The operating parameters of the IP module, such as temperature variations, process parameters in manufacturing, etc., are determined during the characterization phase of the IP.

Characterization of IP is done through extensive design simulations at all levels (e.g., circuit level).

IP (Intellectual Property) Qualification Certification

Any IP core designed by an IP vendor should be able to work well in a specified process technology route. The certification process for this purpose should follow the general requirements and characteristics of the IP design life cycle.

In qualification, the IP blocks are physically tested after the manufacturing process.

Use of IP (Intellectual Property)

IP Design Resources

There are a large number of IP suppliers in today's semiconductor industry, such as Synopsys, Moschip, Atria, Coreworks, IP cores, Mobiviel and Rambus.

Individuals who are technically proficient in the industry (including me) can also sell IP, usually soft IP.

Open source licenses for IP designs are also available free of charge from the opencores.org website.

Get IP design core

Acquisition of IP cores is a rather time-consuming process, so this time must also be calculated in the entire product design cycle.

Typically, chip manufacturers (foundries) provide IP cores such as standard cells and IO modules, while suppliers provide soft IP cores, but must comply with corresponding rules, privacy policies, and terms and conditions of use during and after obtaining the IP.

IP Core Design Examples in VLSI Industry

Standard cells are the earliest IP cores

Standard cells are the first type of IP core ever designed. Highly fixed standard cell families or series are designed together to implement the same set of logical function modules. Standard cells are designed using compatible layout methods.

Registering the register transfer module as an IP core design

Several logic circuits that require n copies to perform n-bit operations can be designed using the IP core approach. The basic building blocks of digital logic circuit design, such as adders, arithmetic logic units (ALUs), and some fixed data paths, can all be designed as IP cores because they are widely used in product design.

Memory Design as IP Core

In VLSI chip design, one of the very important and must-use IP cores is the memory, because they are analog ICs, so they must be designed very carefully. Most memories are designed as hard IP cores and should be able to support a standard set of peripherals.

CPU as IP Design

An embedded CPU used to perform specific functions on an SoC is one of the key types of IP core designs. An embedded processor along with main memory, cache, and I/O devices form the bulk of a complex design.

Input/output (I/O) devices and buses as part of IP core design

SoCs may contain many input and output (I/O) devices, and standardizing them into IP cores becomes an essential part of VLSI chip design.

IP in VLSI must be able to comply with bus standards or bus protocols. Most IP macros will be connected to the main modules, which are then connected to each other through buses.

The IP core must follow some standard bus protocols, such as AMBA, AHB and APB, which are all communication protocols based on the ARM architecture.

In addition, some other design standards must be followed, such as SPI, Ethernet, USB and UART communication protocols.

Verified Intellectual Property Core or Module (VIP)

As IP module design becomes more and more a development trend in semiconductor integrated devices, the need to test and verify them is also increasing. To meet this demand, IP suppliers have proposed the VIP design model, which is the verification-based intellectual property core or module we are going to discuss.

The VIP design lifecycle is very similar to regular IP in VSLI, but the purpose of the VIP is just to verify the design. These VIPs are used to embed design testbenches to assist in the verification process.

Since design verification is important at every level of abstraction, completing such verification on time is equally critical. According to one study, more than 50% of the entire VLSI design lifecycle is spent on verification work at all levels.

Large-scale SOC designs make full use of IP and VIP design environments to shorten time to market and successfully implement VLSI chip product design.

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Good information, is there a PDF document for this, I can download and save it...