BUK9624-55T/R datasheet, PDF - EEWORLD Datasheet

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BUK9624-55T/R: DescriptionTRANSISTOR 45 A, 55 V, 0.024 ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, SMD, D2PAK-3, FET General Purpose Power; CategoryDiscrete semiconductor The transistor; File Size56KB，8 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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BUK9624-55T/R Overview

TRANSISTOR 45 A, 55 V, 0.024 ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, SMD, D2PAK-3, FET General Purpose Power

BUK9624-55T/R Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
package instruction	PLASTIC, SMD, D2PAK-3
Contacts	3
Reach Compliance Code	unknown
ECCN code	EAR99
Other features	LOGIC LEVEL COMPATIBLE, ESD PROTECTED
Avalanche Energy Efficiency Rating (Eas)	80 mJ
Shell connection	DRAIN
Configuration	SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage	55 V
Maximum drain current (ID)	45 A
Maximum drain-source on-resistance	0.024 Ω
FET technology	METAL-OXIDE SEMICONDUCTOR
JESD-30 code	R-PSSO-G2
JESD-609 code	e3
Humidity sensitivity level	1
Number of components	1
Number of terminals	2
Operating mode	ENHANCEMENT MODE
Package body material	PLASTIC/EPOXY
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Polarity/channel type	N-CHANNEL
Maximum pulsed drain current (IDM)	180 A
Certification status	Not Qualified
surface mount	YES
Terminal surface	TIN
Terminal form	GULL WING
Terminal location	SINGLE
Maximum time at peak reflow temperature	NOT SPECIFIED
transistor applications	SWITCHING
Transistor component materials	SILICON
Base Number Matches	1

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Philips Semiconductors

Product specification

TrenchMOS™ transistor

Logic level FET

GENERAL DESCRIPTION

N-channel enhancement mode logic

level field-effect power transistor in a

plastic envelope suitable for surface

mounting. Using ’trench’ technology

the device features very low on-state

resistance and has integral zener

diodes giving ESD protection up to

2kV. It is intended for use in

automotive and general purpose

switching applications.

BUK9624-55

QUICK REFERENCE DATA

SYMBOL

tot

DS(ON)

PARAMETER

Drain-source voltage

Drain current (DC)

Total power dissipation

Junction temperature

Drain-source on-state

resistance

= 5 V

MAX.

103

175

UNIT

˚C

mΩ

PINNING - SOT404

gate

drain

source

drain

DESCRIPTION

PIN CONFIGURATION

SYMBOL

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL

DGR

±V

tot

stg

, T

PARAMETER

Drain-source voltage

Drain-gate voltage

Gate-source voltage

Drain current (DC)

Drain current (pulse peak value)

Total power dissipation

Storage & operating temperature

CONDITIONS

= 20 kΩ

= 25 ˚C

= 100 ˚C

= 25 ˚C

MIN.

- 55

MAX.

180

103

175

UNIT

˚C

ESD LIMITING VALUE

SYMBOL

PARAMETER

Electrostatic discharge capacitor

voltage, all pins

CONDITIONS

Human body model

(100 pF, 1.5 kΩ)

MIN.

MAX.

UNIT

THERMAL RESISTANCES

SYMBOL

th j-mb

th j-a

PARAMETER

Thermal resistance junction to

mounting base

Thermal resistance junction to

ambient

CONDITIONS

Minimum footprint, FR4

board

TYP.

MAX.

1.45

UNIT

K/W

April 1998

Rev 1.000

BUK9624-55T/R Related Products

	BUK9624-55T/R	BUK9624-55/T3	BUK9624-55-T
Description	TRANSISTOR 45 A, 55 V, 0.024 ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, SMD, D2PAK-3, FET General Purpose Power	TRANSISTOR 45 A, 55 V, 0.024 ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC PACKAGE-3, FET General Purpose Power	TRANSISTOR 45 A, 55 V, 0.024 ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC PACKAGE-3, FET General Purpose Power
package instruction	PLASTIC, SMD, D2PAK-3	SMALL OUTLINE, R-PSSO-G2	SMALL OUTLINE, R-PSSO-G2
Contacts	3	3	3
Reach Compliance Code	unknown	unknown	unknown
ECCN code	EAR99	EAR99	EAR99
Other features	LOGIC LEVEL COMPATIBLE, ESD PROTECTED	LOGIC LEVEL COMPATIBLE, ESD PROTECTED	LOGIC LEVEL COMPATIBLE, ESD PROTECTED
Avalanche Energy Efficiency Rating (Eas)	80 mJ	80 mJ	80 mJ
Shell connection	DRAIN	DRAIN	DRAIN
Configuration	SINGLE WITH BUILT-IN DIODE	SINGLE WITH BUILT-IN DIODE	SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage	55 V	55 V	55 V
Maximum drain current (ID)	45 A	45 A	45 A
Maximum drain-source on-resistance	0.024 Ω	0.024 Ω	0.024 Ω
FET technology	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR
JESD-30 code	R-PSSO-G2	R-PSSO-G2	R-PSSO-G2
Number of components	1	1	1
Number of terminals	2	2	2
Operating mode	ENHANCEMENT MODE	ENHANCEMENT MODE	ENHANCEMENT MODE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
Polarity/channel type	N-CHANNEL	N-CHANNEL	N-CHANNEL
Maximum pulsed drain current (IDM)	180 A	180 A	180 A
Certification status	Not Qualified	Not Qualified	Not Qualified
surface mount	YES	YES	YES
Terminal form	GULL WING	GULL WING	GULL WING
Terminal location	SINGLE	SINGLE	SINGLE
transistor applications	SWITCHING	SWITCHING	SWITCHING
Transistor component materials	SILICON	SILICON	SILICON
Base Number Matches	1	1	1

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