Make troubleshooting and fine-tuning digital pre-distortion easier. Please check out the essential guide

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Summary


This article introduces the digital predistortion (DPD) feature of the ADI ADRV9002. Some of the debugging techniques used can also be applied to general DPD systems. First, background information about DPD is outlined, as well as some typical problems that users may encounter when experimenting with their systems. Finally, the article describes tuning strategies that can be applied to the DPD algorithm to analyze performance with the help of DPD software tools.


Introduction


Digital predistortion, commonly referred to as DPD, is an algorithm widely used in wireless communication systems. DPD is designed to suppress spectral regrowth on wideband signals passing through an RF power amplifier (PA), thereby improving the overall efficiency of the PA. Generally speaking, PAs suffer from nonlinear effects and low efficiency when processing high power input signals. Due to spectral regrowth, nonlinear effects and spectral interference occur in adjacent frequency bands. Figure 1 shows spectral regrowth before and after DPD correction using the TETRA1 standard on the ADRV9002 platform.

 

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Figure 1. TETRA1 DPD using ADRV9002


The ADRV9002 provides a power-optimized internal programmable DPD algorithm that can be customized to correct for the nonlinear effects of the PA, thereby improving the overall adjacent channel power ratio (ACPR). Despite the expected benefits of DPD for communication systems, inexperienced personnel often have difficulty getting started with DPD, let alone setting it up correctly. This is mainly because digital predistortion involves multiple factors that can introduce errors that degrade DPD performance. In fact, even after the hardware is set up correctly, it can still be challenging to determine the correct parameters to fine-tune DPD and obtain an optimal solution. This article is intended to help engineers using the DPD option in the ADRV9002 and provide some general strategies for fine-tuning the DPD mode using the available parameters to obtain optimal DPD performance. In addition, MATLAB® tools are used to help users analyze DPD and eliminate common errors, while providing some insights into the internal DPD operation.


When the DPD option is enabled, the ADRV9002 can provide up to 20MHz of signal bandwidth. This is because the receive bandwidth is limited to 100MHz. The DPD will typically operate at a receive bandwidth that is 5 times the transmit bandwidth, so third- and fifth-order intermodulation signals can be seen and corrected. The highest PA peak power signal supported by the ADRV9002 is approximately the 1dB (commonly referred to as P1dB) compression region. This metric indicates how much the PA is compressed. If the PA is compressed beyond the P1dB point, the DPD is not guaranteed to work properly. However, this requirement is not strict; in many cases, the DPD will still work beyond the P1dB point and still provide very good ACPR. But this depends on the specific situation. In general, if the compression is too severe, the DPD may become unstable and collapse. Later, the compression region will be discussed in detail, including how to use MATLAB tools to observe the current PA compression status.


For more details on DPD, see the Digital Predistortion section of UG-1828.


Architecture


There are two basic methods for performing the DPD function. The first method is called indirect DPD, where the signal is captured before and after the PA. The difference is the direct DPD method, where the signal is captured before the DPD block and after the PA. The advantages and disadvantages of each method are beyond the scope of this article. Indirect DPD analyzes the signal before and after the PA to understand its nonlinear characteristics and performs an inversion at the DPD block. Direct DPD analyzes the signal before and after the DPD and after the PA and removes the error between them by applying predistortion at the DPD block. Users should be aware of the indirect method used by the ADRV9002 and the impacts associated with it. It is also important to understand that when using MATLAB tools, the data is captured using an indirect method.


Figure 2 shows a simplified block diagram of the DPD operation of the ADRV9002. The input signal u(n) enters the DPD block. The DPD will predistort the signal and generate x(n). Here, this is called the transmit capture, but this is actually a predistorted version of the transmit signal. The signal then passes through the PA and becomes y(n), which is ultimately sent out into the air. Here, y(n) is called the receive capture, but this is actually the transmit signal after the PA. y(n) is then fed back to the receiver port to act as an observation receiver. Essentially, the DPD engine will use the captured x(n) and y(n) and then generate coefficients that will be applied in the next iteration of the DPD.

 

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Figure 2. Simplified block diagram of indirect DPD


Operating mode


The ADRV9002 supports both TDD and FDD operation on DPD. In TDD mode, DPD is updated every transmit frame. This means that during the transmit frame, the receiver acts as an observation path. In FDD, a dedicated receiver channel is required because the transmitter and receiver operate simultaneously. The 2T2R in the ADRV9002 is able to support DPD in both 2T2R/1T1R TDD and 1T1R FDD modes.


DPD Mode


structure


The following equation shows the DPD pattern implemented in the transmit path.

 image.png

in:


u(n) is the input signal of DPD, and x(n) is the output signal of DPD

T is the total number of branches in the DPD mode

ψt is the polynomial function used to implement the branch t lookup table (LUT), lt is the amplitude delay

kt is the data delay

at,lt,i are the coefficients calculated by the DPD engine

bt, lt, i are switches to enable or disable items

i is the exponent and power of the polynomial terms

The number of polynomial terms for each branch can be configured by the user. The ADRV9002 provides 3 memory term branches and 1 cross term branch, and the order of each branch ranges from 0 to 7.


Mode Selection


The user can select the default mode options provided by the ADRV9002 (as shown in Figure 3), which should be suitable for most common applications. Alternatively, the user can select their own mode by enabling and disabling items. The first three branches (0 to 2) represent the memory items, where branch 1 is the center branch. Branch 3 is the cross-item branch.


Note that to distinguish it from the memory term branch, branch 3 (or the cross term branch) should not have the zero-order term enabled.

 

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Figure 3. Terms of the DPD pattern polynomial


u LUT Size: The user can set the LUT size. The ADRV9002 offers two options, 256 and 512. By selecting the 512 size, the user will get a better quantization noise level and thus a better ACPR, since, in general, a larger size will provide better signal resolution. For narrowband applications, ADI recommends using 512 as the default option. 256 can be used for wideband because the noise level is not as stringent and can improve calculations and power.

u Pre-LUT Scaling: The user can set the pre-LUT scaling module to scale the input data to make it more suitable for the compandor. The compandor selects the signal from the transmitter and compresses it to fit the 8-bit LUT address. Depending on the input signal level, the user can adjust this value to optimize the LUT utilization. Its value can be set in the range of (0,4) with a step size of 0.25. More information about the compandor is provided in the last section of this article.


Configuration

 

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Figure 4. Basic configuration to enable DPD


To perform DPD, the user will have to enable the external loopback path on the PA and then set the feedback power to ensure it is within range. Note that this is peak power, not average power. Too much or too little power will affect DPD performance. The user will also need to set the external path delay, which can be obtained using External_Delay_Measurement.py. The user can find this script in the ADRV9002 evaluation software installation path in the IronPython folder.


Note that the external delay only needs to be set for high sample rate profiles (e.g. LTE 10MHz). For low sample rate profiles (TETRA1 25kHz), the user can set it to 0. Later in this article, the software tool will be used to observe the captured data to understand the impact of the external delay.


Other Configuration

 

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Figure 5. Other configurations on DPD


The number of samples is user configurable. By default, the user can set 4096 samples. It is recommended to use the default value. In most cases, the default of 4096 samples will provide the optimal solution for DPD.


uOther power scaling is a more advanced parameter. In most cases, the default value of 4 is recommended for the ADRV9002. This parameter is related to the internal correlation matrix. Based on experiments, the default value provides the best performance for the existing waveforms and PAs tested by ADI. In rare cases, if the input signal amplitude is very small or very large, the user can try to adjust this value to smaller and larger values ​​so that the correlation matrix maintains the appropriate condition number, resulting in a more stable solution.


u Rx/Tx Normalization: The user should set the receiver/transmitter normalization to a region where the data is linear. In Figure 6, the linear region is shown in red. In this region, the power of the data does not reach the compression region and is high enough to be used to calculate the gain. After selecting this region, DPD estimates the gain of the transmitter and receiver and then continues further processing of the algorithm. In most cases, -25dBFS to -15dBFS should be suitable for most standard PAs. However, the user should still be aware that special PAs may have a very different AM/AM curve shape, in which case appropriate modifications will be required. This will be explained in detail later in this article.

 

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Figure 6. Typical AM/AM curve. The linear region is shown in red.


set up


Hardware Setup

 

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Figure 7. Typical DPD hardware block diagram

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