74LS160 100-base synchronous adder counter

The 100-base synchronous adder counter composed of 74LS160
can be seen from the figure: before the low-order chip CT74LS160 (1) counts to 9, its carry output CO = Q3Q0 = 0, and the high-order chip CT74LS160 (2) CTT = 0, maintaining the original state. When the low-order chip counts to 9, its output CO = 1, that is, the CTT of the high-order chip = 1, at this time, the high-order chip can receive the count pulse input from the CP terminal. Therefore, when the 10th count pulse is input, the low-order chip returns to the 0 state, and the high-order chip adds 1 at the same time.