Advantages of Low-Power ADCs

In the ADC space, market demands can be summarized in a few key requirements: lowest power, lowest noise, lowest distortion, highest resolution, serial interfaces, higher channel integration, and wider bandwidth. Low power is important not only in always-on systems such as base stations, but also in tightly packed chassis with limited or no air flow, and certainly in portable applications. Doze and shutdown modes can further reduce power. At some point, reducing the power consumption of the ADC leads to diminishing returns, where the ADC driver consumes more power than the ADC itself. Linear Technology has developed new methods that can be used to reduce power consumption throughout the signal chain. For example, increasing the sampling time of the SAR ADC allows the use of a driver that settles much slower but consumes less power. Another method used only in Linear Technology SAR ADCs is digital gain compression (DGC), which removes the negative supply of the driver amplifier without sacrificing any resolution of the ADC. Eliminating the negative rail reduces the overall power consumption of the signal chain and simplifies the design.

　　Because Linear Technology's SAR ADC architecture has an automatic power-down feature, power scales linearly with sampling rate, so the lower the device sampling rate, the lower the power consumed. With a true zero-latency SAR ADC with no minimum sampling rate requirement, single-shot operation can be used to reduce power consumption, allowing the ADC to make accurate measurements even after lengthy idle periods.

　　Reducing the input range that the ADC driver must drive can also significantly reduce the power consumption of the signal chain. If the input range is doubled, the noise figure increases by 6dB and the power required by the amplifier increases by 4 times. For a given driver, a smaller ADC input range will produce lower intermodulation distortion (IMD) products.

　　Larger input ranges are used to achieve higher ADC SNR performance, but larger input ranges do not necessarily result in better input referred noise, which is important in low power, high accuracy applications such as infrared, X-ray imaging, cell sorters, etc. Low input referred noise is desirable because it provides much better effective resolution or noise-free code resolution for the application. Interesting results emerge when comparing the input referred noise of a 16-bit, 10Msps SAR ADC with an 8Vp-p input range and a Linear Technology 16-bit, 20Msps pipeline ADC with a 2.1Vp-p input range. The latter has an input referred noise of only 46µVrms (versus 75µVrms) at nearly half the power of the SAR ADC.

　　Lower power ADCs and their associated ability to reduce overall signal chain power consumption are providing a competitive advantage to many handheld products, allowing their batteries to run longer between charges. Many applications can now be upgraded to take advantage of higher resolution, faster sampling devices while reducing overall system power consumption. This simplifies the front-end design, requiring fewer gain stages and lower filtering requirements. Oversampling can also reveal details that may not be visible with a lower speed ADC, such as overlapping or malformed pulses. Applications that have benefited from this available performance improvement include handheld test equipment, medical imaging, spectrometers, lithography, anemometers, solid-state lighting, industrial sensors, power meters and programmable logic controllers, to name a few. For more information on Linear Technology's low power ADCs, please visit www.LinearTech.com.