Digital Characteristics of High-Speed ​​DACs

Today's high-speed digital-to-analog converters (DACs) usually contain many digital signal processing blocks to make them easier to use. For the purpose of this discussion, we used TI's DAC34H84, which is a 4-channel, 16-bit, 1250 Msps DAC. The reason for this is that it is a typical high-speed digital-to-analog converter with an input FIFO that isolates the input and DAC clock domains, an interpolation digital block, fine frequency resolution digital quadrature modulation, analog quadrature modulator correction, and sin(x)/x correction. This article will introduce the functions and effects of these features one by one.

Figure 1 DAC34H84 functional structure diagram

The first digital block is the interpolation block, which is responsible for increasing the sample rate of the digital signal inside the DAC. Generally speaking, interpolation is implemented using steps of two times the sample rate. This is done by inserting zeros between the input sample points, which produces two signals at fIF and FIN – fIF. After passing through a digital low-pass filter, the second signal at FIN – fIF is removed, leaving only the signal at fIF. The reason for using interpolation has to do with the zero-order hold output structure used by most high-speed DACs. With zero-order hold, the DAC sets the output amplitude accordingly based on the digital sample at the beginning of the clock cycle, and then holds it until the end of the clock cycle and the next output sample. This produces an output that “stairs up” with a frequency response as expressed in Equation 1:

sin(π*fIF/fs)/(?π*fIF/fs) Equation 1

Where fIF is the analog output frequency and fs is the sampling rate. This response has a low-pass effect (see Figure 2) with a loss of ~ 3.5 dB at f = fs/2 and zero at multiples of fs. Although the DAC output will have a signal image at N*fs +/- fIF, the image amplitude in the upper Nyquist region is much lower than the signal at fIF, resulting in a lower signal-to-noise ratio (SNR) and the possibility of significant amplitude roll-off. This limits most applications to output signal frequencies below fs/2. In addition, the separation between the signal at fIF and the fs – fIF image decreases as fIF approaches fs/2, making it difficult to establish the analog filter at the DAC output (which removes the unwanted fs – fIF image), ultimately limiting fIF to less than fs/3 for most applications.

Figure 2 DAC output spectrum without interpolation module

To increase the DAC internal sampling rate using the DAC interpolation block, we only need to make the DAC digital interface rate fIN high enough to allow the signal bandwidth to be transmitted, and only need to add a small amount of additional bandwidth to have the interpolation filter transition band (fin > 2.5*BW for real signals and fin> 1.25*BW for complex signals). By increasing the sampling rate using interpolation, the signal can easily be below fs/2.

Another benefit of increasing the sampling rate is that it allows digital mixing to increase the output IF to a higher frequency. For example, using 2X interpolation, the output frequency can be higher than fin/2, which is not possible without interpolation (see Figure 3). In general, complex input signals use complex mixers to avoid images during the mixing process. The output of the mixer can be a real IF signal or a complex IF signal, which is available after the analog IQ modulator DAC.

Figure 3 DAC output spectrum with 2X interpolation

Using the complex DAC output for an analog quadrature modulator (AQM) highlights another useful digital feature common to high-speed DACs—the quadrature modulator correction block. This block corrects the gain, phase, and offset imbalances of the analog quadrature modulator, thereby improving AQM sideband suppression and LO feedthrough.

Finally, at the end of the digital signal chain is a digital FIR filter that compensates for the Sin(x)/x high and low frequency regularity attenuation in the first Nyquist zone. In the DAC34H84 implementation, this filter can provide compensation up to 0.4*fDAC with less than 0.03dB error.

As shown in this article, high-speed DACs such as the DAC34H84 have a number of digital features that make system implementation simple and easy by reducing data rates and improving output signal characteristics.