Best Design Solution for ESD Protection of High-Speed ​​Circuits

Electrostatic discharge (ESD) can have devastating consequences in the electronic device environment. In fact, more than 25% of semiconductor chip damage is attributed to ESD in circuit packaging and assembled, large electronic devices in use in various circuits.

Typically, a discharge from a part of the human body (a finger) will charge a different material, which will then be transferred to the conductive contacts attached to the electronic device. This will cause damage to the IC and justify blaming the end-user device manufacturer.

The problem is so serious that the European Union has established special ESD suppression standards for any goods sold within the economic zone. Now design engineers must provide effective ESD protection for today's more sensitive semiconductors.

Unfortunately, this task often follows the design principle of afterthought: First build the circuit without additional overvoltage transient suppression, relying on the IC on the board for protection. If testing shows sensitivity at the prototype stage, then the protection device is added. If this approach is adopted to meet today's requirements of lower amplifier voltages, increased frequencies and lower noise, the entire design must be optimized and integrated. Adding protection at the end may be very expensive or impractical due to time constraints.

Typically, ESD events are described by three main ESD algorithms based on the type of charging process and the severity of transient electrophoresis: the human body model (HBM), the charged device model (CDM), and the machine model (MM). These models define the type of transient effects, so that design engineers can define clear semiconductor overvoltage chip transient level sensitivity, as well as chip and assembly product test procedures. Using these models, circuit design engineers can test the ESD protection efficiency of chips and products, and can quantitatively compare with alternative solutions.

The most common cause of ESD damage is the direct transfer of charge through a series resistor, such as a human finger. Therefore, the best ESD model is HBM. In the device under test (DUT), this is represented by a 100pF capacitor discharging through a 1500Ω resistor into the device. The commercial version of this standard is Military Specification 883 Method 3015 (Figure 1a).

The most popular HBM variant is the International Electrotechnical Commission IEC1000-4-2 standard, which defines a 150pF capacitor discharged through a 330Ω resistor (Figure 1b). This is an international test required by the European Union for goods to be sold within its region.

However, there are significant differences in transient voltage threats and energy levels between the two models. Design engineers can then tailor the test process to the specific application they desire. For example, IEC1000-4-2 has a very fast level pulse rise time, can apply more pulses and higher peak currents (see table).

Recently, circuit designers have been adding protection through a number of transient voltage suppressor (TVS) devices. Some examples include solid-state devices (diodes), metal oxide varistors (MOVs), silicon-controlled rectifiers, other variable voltage materials (new polymer devices), gas tubes, and simple spark gaps.

These devices are placed between the input and ground. When the input voltage reaches a level that causes them to "open" or conduct, they can quickly reduce their impedance. Ideally, the input threat is partially reflected back, and the balance is partially shunted to ground through the conducting TVS device. Therefore, only a smaller proportion of the threat in the circuit can reach the sensitive IC.

However, ESD suppression devices also have their own advantages and disadvantages. With the emergence of a new generation of high-speed circuits, some disadvantages have been magnified. For example, TVS must respond quickly to incoming surge voltages. When the surge voltage reaches a peak of 8KV (or higher) at 0.7ns, the trigger or adjustment voltage of the TVS device (in parallel with the input line) must be low enough to act as an effective voltage divider.

Some devices protect the circuit but age after only a few current pulses and/or fall into a low impedance (short circuit) state, creating a high current path from the circuit to ground. This can be fatal for battery-powered devices.

Each device has its own differences. Gas discharge tubes can pass large currents, but are slow to respond. They also age and cannot recover. MOVs can provide a relatively slow turn-on response for high-speed circuits. Silicon diodes have very fast trigger response and low turn-on voltage, but they, like MOVs and other devices, have high capacitance, which can affect high-speed signals.

The higher the frequency, the greater the capacitance effect. The new ESD transformers are currently the only ones that can offer extremely low capacitance and very low off-leakage current. In addition, they can self-recover after multiple pulses.

Now consider the cost factor. Designers try to minimize the cost of non-essential components. Diode prices have always been low due to oversupply. Some new high-frequency polymer devices are also very competitively priced.

Several major design factors have simplified the ESD suppressor problem in the past. Higher voltage, slower, more robust ICs are less sensitive to surge voltages. Lower operating frequencies also mean that speed of protection is less important. Also, circuits with higher impedance traces and pin components, packages with more metal, and fewer external nodes make things simpler.

But the electronics industry has changed. The consumer telecommunications industry is exploding with more handheld devices. Device operating frequencies have risen from a few kHz to GHz, creating design distortion issues for high-capacity passive devices used for ESD protection. In addition, chip operating voltages are being reduced, which helps greatly increase sensitivity to any and high-energy transients (heating/melting of fixed junctions). At the same time, new high-frequency digital devices require very low off-leakage current to reduce noise.

In a low-cost production environment, cost reduction is a major goal for all circuit components. Therefore, an effective ESD suppressor should provide the following key benefits and features to the design engineer (not necessarily in order of importance):

Cost-effective;

Protects audio and video I/O lines and RF connectivity ports in new consumer electronics without sacrificing performance;

Protect new communication connection hardware;

Stable device characteristics over a wide operating frequency range;

Capacitors below 1pF are used in ultra-wideband circuits operating at frequencies of several GHz;

Minimum leakage current in off-state condition to reduce noise;

Reduce the signal distortion and attenuation of the working circuit caused by ESD suppressor components;

为提供有效保护，触发和箝位特性要与电路器件要求一致；

Have the required assembly characteristics, form factor and PCB package to facilitate use in high-speed automated assembly lines;

Among the various optional devices, it is best to have high interchangeability without changing the circuit board;

High reliability during the product's service life.

Layout Guide

Regardless of the TVS device selected, their layout on the circuit board is very important. The wire length before TVS layout should be minimized because fast (0.7ns) ESD pulses may generate additional voltage that degrades the protection capability of the TVS.

In addition, fast ESD pulses may induce voltages between adjacent (parallel) wires on the circuit board. If the above situation occurs, there will be no protection because the induced voltage path will become another path for the surge to reach the IC. Therefore, the protected input line should not be placed next to other separate, unprotected traces. The recommended PCB layout scheme for ESD suppression devices should be: placed before the protected IC, but as close as possible to the connector/contact PCB side; placed before any resistors in series with the signal line; placed before filtering or regulating devices including fuses; placed before other possible ESD locations before the IC.

由于业界对在高频电路中采用ESD抑制越来越感兴趣，所以已对消费电子领域中的一些大型器件进行了研究。对比数据表明，尽管低成本的硅二极管（甚至变阻器）的触发/箝位电压非常低，但它们的高频容量和漏电流无法满足不断增长的应用需求。

Another important requirement is that the ESD suppressor has minimal effect on the circuit's signal characteristics. Measurements on polymer ESD suppressors have shown an attenuation of less than 0.2 dB at frequencies up to 6 GHz, so they have little effect on the circuit.

In addition, commercial products require ESD surge protection at all different hardware interface locations. For example, some new computers and higher-end consumer electronics may have most or all of the following interconnects: Ethernet, USB1.1/USB2.0, IEEE-1394/1394b, audio/video/RF, and traditional RS-232, RJ-11, etc. ports. All traditional protection devices have been successfully applied to varying degrees. However, today's increasing operating frequencies have created a demand for ultra-low capacitance devices such as polymer suppressors (Figure 2a).

The USB 2.0 protocol has a fast data transfer rate of 100 Mbps. Therefore, a USB 2.0-enabled device will perform best when protected by an ultra-low capacitance polymer device with SurgX technology (Figure 2b). This will produce less data distortion than when using a Zener diode or multilayer varistor.

In addition, many new consumer electronic devices can implement the fast IEEE-1394/1394b (Fireware) data transfer protocol. This very high data rate (1600 Mbps, 1394b) requires low capacitance ESD suppressors, such as polymer surge devices (Figure 2c). Test data shows that polymer ESD suppressors cause less signal distortion than silicon diode devices protecting Firewire ports (Figure 3).