Implementation of DSP and Flash Interface Technology

1 Introduction

In modern digital signal processing systems, using Flash as a DSP program load and boot is a common method, which provides users with an effective means of maintaining systems that may need to change data or code in the future. Using Flash devices, online program writing can be achieved, reducing the trouble caused by EPROM program burning.

2 Flash AM29LV800B Introduction

Flash memory, also known as flash memory, combines the characteristics of ROM and RAM. It not only has the function of electronically erasable and programmable (EEPROM), but also will not lose data due to power failure and can read data quickly. It has the characteristics of online electrical erasure, low power consumption, large capacity, fast erasing speed, etc. It is an improved product of EEPROM.

2.1 Main performance

AM29LV800BB-90EC is a device in AMD's AM29LV800B series. Its main performance is as follows: access time: 90 ns; storage capacity: 8Mbit; operating temperature range: -55～+125℃; online programming voltage: 3.0～3.6 V; low power consumption: 7 mA current during read operation and 15 mA current during programming/erasing.

2.2 Pin Function Description

A0-A18: 19 address lines;

DQ0-DQ14: 15 data lines;

DQ15/A-1: When configured in 16-bit word mode, this pin is the data I/O, which constitutes the highest bit DQ15 of the 16-bit word; when configured in 8-bit byte mode, this pin is the address input, which is the least significant bit A-1 of the address line;

2.3 Working Mode

2.3.1 Read Mode

To read data, the system needs to set CE and OE to low level and WE to high level. After the device is powered on or hardware reset, the device is set to read mode by default.

2.3.2 Write Mode

In order to write data or instructions to the device, the system needs to set CE and WE to low levels and OE to high levels at the same time. The write operation requires 4 cycles. The first 3 cycles write 3 specific characters to two specific addresses, and the fourth cycle writes the required data to the corresponding address:

2.3.3 Reset

Write a specific command to any address of the device, the device will reset, and the default mode after reset is read mode.

2.3.4 Automatic selection mode

By writing three specific characters to two specific addresses of the device, the device enters the automatic selection mode. In this mode, the manufacturer number and device number of the device are obtained, and the system must be disconnected by a reset instruction.

2.3.5 Erase Mode

Chip erase is a 6-cycle operation that requires writing 4 specific characters to two specific addresses.

3 DSP and Flash interface design

ADSP-TS201 is a device of ADI's TigerSHARC series processors. Its core operating frequency can be as high as 600 MHz, the instruction cycle is 1.6 ns, the on-chip memory DRAM is 24 Mbit, and it has integrated I/O interfaces, including a 14-channel DMA controller, 4 link ports, programmable flag pins, SDRAM controller, external ports, 2 timers, etc. It has an IEEE 1149.1-compatible JTAG port for online simulation, and a flexible instruction set and DSP structure that supports high-level languages ​​facilitate DSP programming.

ADSP has no ROM inside the chip, so applications and data cannot be directly stored inside the DSP. Applications usually need to be stored in external memory. When the system is working, the application is loaded into the DSP for execution through loading operations. Since the EPROM space only provides 8-bit data lines, if the Flash is 16 bits or even higher, then the Flash should be configured to work in 8 bits. Since the EPROM interface is specially designed for the processor to use EPROM or Flash for program booting, and the data transmission between EPROM and Flash is not high-speed, in order to ensure that the general EPROM and Flash can correctly guide the processor to run the program, ADSP-TS201 needs to insert 16 wait cycles during each EPROM read operation, and there are 3 wait cycles after the last EPROM boot bus cycle, which is used as the disconnection time of the EPROM. ADSP-TS201 provides a BMS pin for boot memory selection, which serves as the chip select signal of Flash to realize system loading. At this time, TigerSHARC can only automatically load the program from EPROM to TigerSHARC memory through a specific DMA channel 0, and the external bus automatically packs the byte data into 32-bit instructions. In addition, TS201 provides /MS0 and /MS1 pins for memory selection. When DSP accesses memory bank0 or bank1 respectively, MS0 or MS1 is valid. This pin can also be used as the chip select signal of Flash to realize online programming of Flash. By implementing the hardware in this way, the processor core or non-EPROM type DMA method can be used to access Flash, but the processor will not automatically complete the packing and unpacking of 32-bit words and 8-bit words. It is particularly important to write a special packing program. The principle is shown in Figure 1.

4 Programming the software loaded into Flash

This program uses assembly language, and the entire program flow is shown in Figure 2. When the connection shown in Figure 1 is used, ADSP-TS201 writes a word to Flash. Since the DSP external data bus is [31:0], and Flash only connects the lower 8 bits, the DSP needs to package the data before writing it to Flash. The following is the key program code designed for this system.

The erase operation and erase status query are very important for Flash, because the write operation of any Flash device can only be performed in empty or erased cells, so in most cases, the erase operation must be performed before the write operation. The erase operation can be completed with a 6-cycle instruction. This operation clears all the contents of the Flash to zero, then reads data from any address of the Flash, compares it with 0, and determines whether the erase operation is successful. The relevant instruction code is as follows: The flow of the entire program is shown in Figure 2.

5 Conclusion

Taking Flash AM29LV800B as an example, the hardware interface design of Flash and DSP and the basic steps of Flash burning program are proposed. This system design makes the software design relatively simple and has been applied to modern digital signal processing systems many times with good results.