How to Choose the Best Amplifier to Drive a SAR Analog-to-Digital Converter

In this article, we consider these issues in the context of driving a SAR (successive approximation register) ADC.

SAR ADCs are widely used in the world of analog-to-digital converters. Generally speaking, this type of ADC falls between high-resolution, low-speed delta-sigma (delta-sigma) ADCs and high-speed, lower-resolution pipeline ADCs. With their zero-latency nature, SAR ADCs are often a better choice than delta-sigma and pipeline ADCs in many applications, including those with multiplexed signals, those that require an accurate first conversion after any idle period (such as automated test equipment), and those where the ADC is in a loop that requires fast feedback.

In most cases, the output of the sensor cannot be directly connected to the input of the SAR ADC. An amplifier is required to obtain the best SNR (signal-to-noise ratio) and distortion performance. The SAR ADC samples the input onto an internal capacitor and compares the input voltage to a reference voltage in a progressive binary weighted sequence. When the switch connected to the sampling capacitor is turned on, charge is injected into the input node due to the mismatch between the sampling capacitor and the input node voltage. A simple single-pole RC filter is placed between the amplifier and the ADC. In addition to filtering out high-frequency noise and aliasing components, it also helps absorb this injected charge. Care must be taken when selecting the cutoff frequency for this filter. The cutoff frequency should be set low enough to effectively absorb the injected charge and filter out the noise, but high enough to allow the amplifier to settle within the sampling time of the data converter. Because this filter alone is not sufficient to suppress noise, a filter with a lower cutoff frequency is typically included at the amplifier input (see Figure 1).

Figure 1: LTC2379 18-bit 1.8Msps differential input SAR ADC.

Driving a Differential Input SAR ADC

Many of the highest performance SAR ADCs use differential inputs to maximize the dynamic range of low supply voltages. The LTC2379-18, shown in Figure 1, is one such example, operating from a 2.5V supply and a reference voltage up to 5V to achieve a 10V peak-to-peak differential input range. If the input signal is already differential, then a low noise, fast settling dual op amp such as the LT6203 may be sufficient to buffer the signal and drive the ADC. Configuring this type of amplifier as a unity gain buffer presents a high impedance input to the input signal.

However, in many cases, the input is single-ended and must be converted to a differential signal. This task is easily accomplished with an amplifier such as the LT6350. This type of amplifier consists of two stages: the first stage produces a non-inverting buffered input signal, and the second stage produces an inverting output. If the input signal is already matched to the input range of the ADC, then this amplifier can be used to provide a high impedance buffer for the signal, as shown in Figure 2a. If the signal needs to be scaled and shifted to match the input range of the ADC, then this can be done using the method shown in Figure 2b. In this example, a single-ended ±10V signal is converted to a 0-5V differential signal (R2 and R3 are used to shift the signal, and RIN and R1 are used to scale the signal). Something that is often overlooked in precision analog circuits is the need for close matching between gain setting and level shifting resistors. If discrete resistors with precision of 0.1% are used, the mismatch that varies with time, temperature, and common-mode voltage range can be so great that it can become a major source of error in the circuit. Using precisely matched resistors such as the LT5400 will help alleviate this problem.

Figure 2: Single-ended to differential conversion using the LT6350.

Amplifiers require some margin between the supply voltage and the output voltage. To maintain the best accuracy and linearity, the output voltage must typically be 0.5V or more below the supply rail, depending on the amplifier. This means that the amplifier must be supplied with a supply voltage wider than the ADC input range, or the ADC must accept a restricted input range from the amplifier. Some ADCs, such as the LTC2379-18, have a "digital gain compression" feature that internally sets the ADC's full scale to 0.5V from both ground and the reference voltage. This allows the amplifier to be matched to the ADC's full scale using a single 5V supply.

Driving a Pseudo-Differential ADC

When converting a single-ended analog signal to digital, an alternative approach is to skip the differential conversion altogether and use a pseudo-differential ADC such as the new LTC2369-18 instead. This will come at the expense of up to 6dB of signal-to-noise ratio due to the reduced input range. In addition, differential architectures are inherently easier to eliminate even-order harmonics. However, there are some important advantages to sticking with a single-ended architecture: The drive circuit is simpler and can be as simple as using just one low-noise, fast-settling op amp such as the LT6202. There is no need to use a second op amp and multiple resistors to create an inverting input. In addition to using fewer components, the circuit also inherently consumes less power and has lower noise. Because of the lower noise, the antialiasing filter following the amplifier can have a higher cutoff frequency. This allows the amplifier to settle more easily within the ADC conversion time, making it a good choice in applications where the successive conversions may vary across the full-scale range, as is the case with multiplexed signals.

Once again, it is important to consider the amplifier’s headroom, meaning the supply voltage must be far enough away from the amplifier’s output swing to drive the signal without distortion. In most cases, this means that a negative rail must be provided to the amplifier. One way to address this problem is to use a product such as the LTC6360. This new amplifier (Figure 3) is optimized for driving SAR ADCs and features an ultralow noise integrated charge pump to generate its own internal negative rail. This allows the output to swing all the way to ground or even a little below ground when powered from only a single positive supply. The LTC6360 offers excellent accuracy (250μV offset voltage, 2.3nV/√Hz noise) while also settling very quickly (150ns to 16 bits).

Figure 3: The LTC6360 swings to true 0V when used with a single supply.

Conclusion

There are several amplifier topologies that can be used to drive a SAR ADC. The best choice depends on the input signal, the ADC input architecture, and application details, such as whether the input signal is multiplexed. In addition, there are trade-offs to consider, including power consumption, complexity, performance, and speed (conversion rate and settling time).