Principles of Single-Chip Microcomputers P0: 80C51 Structure Principles

　　The most you can learn from 51 is some of the so-called garbage scientific and technological innovation, but since I also have to take an exam for this course, I might as well write something and post it on my blog.

　　This series mainly refers to the contents of the book "Single-Chip Microcomputer Principles and Interface Technology" (the characteristic of this book is that it contains a lot of nonsense, a Chinese-style textbook) + a little CSAPP, and the teacher's courseware.

0. Representation of machine code

　　I believe everyone must be familiar with the simple original code, inverse code and complement code. Now let's talk about the calculation of BCD code and IEEE standard floating point number.

　　Representation and calculation of BCD code:

　　BCD code uses 4-bit binary code to represent the 10 digits 0-9 in decimal numbers. There are many forms of BCD code, such as 8421 code, remainder 3 code, 5421 code and 2421 code, among which 8421 code is the most widely used.

For 8421 BCD code calculation, we need to pay attention to a trick. Since most chips perform operations according to the rules of binary addition, including 51, 51 provides a DA instruction to handle the adjustment of this BCD code (note that the DA instruction should generally be after the ADD or ADC instruction. Note that 51 does not have a subtraction instruction for BCD code, which needs to be designed by yourself).

DA is essentially an adjustment to the A register. The specific steps of the adjustment are: if the lower 4 bits of A are greater than 9 or the auxiliary carry flag AC is "1", then add 6 to the lower 4 bits. Similarly, if the upper 4 bits of A are greater than 9 or only the flag CY is 1, then add 6 to the upper 4 bits.

　　For example, a simple addition of 98H + 03H equals 9BH (CY = 0, AC = 0).

   1001 1000

+ 0000 0011

= 1001 1011

　　9BH is obviously not the correct result, so we need to adjust it. The lower 4 bits need to be added with 6, becoming 0001. At the same time, the upper 4 bits become 1010 due to the carry after adjustment.

    1001 1011

+ 0000 0110

= 1010 0001

　　At this time, we can see that the upper four digits are still greater than 10, so continue to adjust

      1010 0001

+   0110 0000

= 10000 0001

　　The BCD code is 101, and we get the correct answer. At this time, the AC bit of the 51 microcontroller is 0, and CY = 1

　　The program in the 51 microcontroller can be written like this:

MOV A, #98HADD A, #03H
And A

　　As for why it is +6, it is actually very simple, because the BCD code represents the ten numbers from 0 to 9, but the hexadecimal number has 16 digits, so the 6 codes greater than 1001 are illegal relative to the BCD code. When we add 6, it will produce (10 + X +6) mod 6 (0 

　　Representation and calculation of IEEE code (must know for software engineering, non-professionals can just learn about it):

　　Of course, this part of the textbook is too superficial. The IEEE code is actually a very clever design. Let's take a look at the example of CSAPP:

　　The representation of IEEE floating point numbers is divided into three parts: sign, mantissa, and exponent.

　　General rule: V = (-1)^S * M * 2^E

　　According to the coding value, it can be divided into four cases: (Illustration of CSAPP)

　　Case 1 (normalized value): When the value of exp is neither all 0 nor all 1 (255 for single precision and 2047 for double precision), it belongs to this case. In this case, the exponent field is interpreted as a signed integer represented in biased form. The exponent value is E = e - Bias, where e is an unsigned number 2^k, and Bias is equal to 2^(k - 1) - 1) (127 for single precision and 1023 for double precision). The range of the exponent is -126~+127 for single precision and -1022~1023 for double precision.

The frac field is a location that describes the fractional value f (0 <= f < 1) but the IEEE defines the mantissa as M = 1 + f (M is a number in binary representation 1.xxx).

　　Case 2 (denormalized numbers): In this case, the exponent value is E = 1 - Bias, and the mantissa is M = f (no hidden 1). This is a clever design, and we will see its subtlety later. At the same time, denormalized numbers can represent 0 (-0.0 and +0.0), as well as those that gradually overflow (gradual underflow), where the possible value distribution is uniformly close to 0.0.

　　Case 3 (special value): When the decimal field is all 0, we know that 0 to the power of n is meaningless. IEEE defines this value as infinity (s = 0 is positive infinity, s = 1 is negative infinity). When we multiply or divide many large numbers by 0, infinity can indicate overflow. NAN stands for "Not a Number". When the result of some operations cannot be a real number or infinity, NAN is also indicated (typical examples are -1 square root, infinity-infinity).

　　According to the rules, we can write the table above. From the table, we can see the subtlety of the design of IEEE floating-point numbers. The change from denormalized numbers to normalized numbers is smooth! This makes it convenient for computers to judge the size of numbers. Computers only need to be responsible for binary bits, without additional rules, so that floating-point numbers can also be sorted using integer sorting functions like fixed-point numbers.

Note that the operation rules of floating-point numbers are different from those of integers and do not satisfy the Abelian group, so the addition and multiplication of floating-point numbers do not have group characteristics. For example: the value of (1e20 *1e20)*1e-20 is NAN, but the value of 1e20 * (1e20*1e-20) is 1e20.

1. Microcomputer Principles and Concepts

　　1. The microcomputer system consists of CPU, memory (ROM and RAM), input/output interface circuit (IO) and system bus (BUS, which can be divided into data bus, address bus and control bus according to the different types of information transmitted).

　　The address bus (AD) is always three-state and unidirectional;

　　The signal line of the control bus (CB) can be unidirectional or bidirectional, tri-state or non-tri-state;

　　The data bus (DB) is always bidirectional and monomorphic.

　　2. Basic components of a microcomputer (5 parts)

　　Arithmetic Logic Unit (ALU): As the name suggests, it is used to process arithmetic instructions.

　　Accumulator (Accounter, ACC): to transfer various calculation results.

　　Flag Register (FR): stores status flags (8 bits in 51).

　　Program Counter (PC): A register that stores the location of the next instruction. It cannot be addressed (of course, the value can be obtained through the stack push trick), and the CPU automatically modifies it (according to the instruction length).

　　Instruction Register (IR): A register that stores the current instruction.

2. Microcomputer memory

　　There are five types of ROM: Masked (cannot be modified after leaving the factory), Programmable (allows one-time programming), Erasable (erasable by ultraviolet light), Electrically Erasable, and Flash Memory.

　　RAM can be divided into two types: static (generally used in registers) and dynamic (which is the memory of our computer).

3. 80C51 basic structure and principle

　　First of all, 80C51 is a bus structure, and the data bus and address bus are often multiplexed.

　　The figure above is a standard 80C51 pin diagram. The functions of these pins are as follows:

1: VCC is the power supply terminal, VSS is the ground terminal

2: XTAL1 (TTL clock ground) and XTAL2 (TTL clock input) are the parts connected to the crystal oscillator.

3: ALE address latch, used to latch the address of port P0.

4: External program selection signal PSEN: specially used for external ROM expansion (please use RD and WD to expand external RAM, PSEN is invalid for external RAM), low level is valid, and it is valid twice in each machine cycle.

5: EA is equivalent to the external ROM selection bit. When it is high, it selects the chip memory storage instruction. When it is low, only the external chip is executed. It should be noted that when EA is high, when the value of PC exceeds 0FFFH, it will automatically turn to execute the program instruction outside the chip.

6. RST is the reset signal.

7. IO ports (P0, P1, P2, P3)

Manual diagram English explanation: http://pdf-file.ic37.com/pdf1/PHILIPS/PCB80C31BH3-16H_datasheet_146374/238405/PCB80C31BH3-16H_datasheet.pdf　 

80C51 internal composition:

1. CPU: includes arithmetic unit circuit (ALU, ACC, B register, status register, register 1 and register 2), controller circuit (PC, PC+1 register, IR (instruction register), instruction decoder, data pointer DPTR, stack pointer SP, buffer and timing control circuit.)

2. Timer/Counter (16-bit)

3. Memory (RAM and ROM)

4. Parallel IO (4 P ports)

5. Serial port (an asynchronous full-duplex serial communication interface (asynchronous: receiving and receiving use different clocks, full-duplex: data can be transmitted in both directions simultaneously (different from half-duplex))).

6. 5 interrupt sources (external interrupt 0, 1, timer interrupt 0, 1, serial port interrupt)

4. 80C51 four major IO ports (all parallel ports)

　　 0. P0 port:

　　This port is very important and will be used frequently in the future. This port is a fairly standard input and output port. If we look at the right side of the entire circuit, we can find that its circuit lacks a resistor (pull-up resistor). This is the most special feature of the P0 port among the four parallel ports. As a bidirectional port, the P0 port does not require a pull-up resistor when it is an input port, but it does require a pull-up resistor when it is an output port. (A typical example is that the P0 port can only light up a light bulb at a low level)

　　At the same time, P0 is a true bidirectional port, which means that when it is used to expand the circuit, it needs to be responsible for transmitting data and addresses. When expanding externally, remember to add a latch chip to the P0 port. For example, the 373 latch is added when expanding the 2732 memory in the figure below.