The development environment selected is MPLAB X IDE v5.50 and xc8-v2.32-full-install-windows-x64-installer.
1 Basic principles
2 Implementation Code
The code is mainly written based on FIGURE 25-1 and the interrupt logic block diagram, so that the code is readable and easy to understand. However, some registers may not be explained in the block diagram, so you also need to carefully read the official document of Timer 0, that is, the basic principle part.
/*
* File: timer0.c
* Author: Sure
*---------------System functions:
Interrupt Timer 0
* Created on October 21, 2021, 7:48 PM
*/
//PIC16F15323 Configuration Bit Settings
//----------Fuse Configuration--------------
// 'C' source line config statements
//CONFIG1
#pragma config FEXTOSC = ECH // External Oscillator mode selection bits (EC above 8MHz; PFM set to high power)
#pragma config RSTOSC = EXT1X // Power-up default value for COSC bits (EXTOSC operating per FEXTOSC bits)
#pragma config CLKOUTEN = OFF // Clock Out Enable bit (CLKOUT function is disabled; i/o or oscillator function on OSC2)
#pragma config CSWEN = OFF // Clock Switch Enable bit (Writing to NOSC and NDIV is allowed)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (FSCM timer enabled)
//CONFIG2
#pragma config MCLRE = OFF // Master Clear Enable bit (MCLR pin is Master Clear function)
#pragma config PWRTE = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config LPBOREN = OFF // Low-Power BOR enable bit (ULPBOR disabled)
#pragma config BOREN = OFF // Brown-out reset enable bits (Brown-out Reset Enabled, SBOREN bit is ignored)
#pragma config BORV = LO // Brown-out Reset Voltage Selection (Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices)
#pragma config ZCD = OFF // Zero-cross detect disable (Zero-cross detect circuit is disabled at POR.)
#pragma config PPS1WAY = OFF // Peripheral Pin Select one-way control (The PPSLOCK bit can be cleared and set only once in software)
#pragma config STVREN = OFF // Stack Overflow/Underflow Reset Enable bit (Stack Overflow or Underflow will cause a reset)
//CONFIG3
#pragma config WDTCPS = WDTCPS_31 // WDT Period Select bits (Divider ratio 1:65536; software control of WDTPS)
#pragma config WDTE = OFF // WDT operating mode (WDT enabled regardless of sleep; SWDTEN ignored)
#pragma config WDTCWS = WDTCWS_7 // WDT Window Select bits (window always open (100%); software control; keyed access not required)
#pragma config WDTCCS = SC // WDT input clock selector (Software Control)
//CONFIG4
#pragma config BBSIZE = BB512 // Boot Block Size Selection bits (512 words boot block size)
#pragma config BBEN = OFF // Boot Block Enable bit (Boot Block disabled)
#pragma config SAFEN = OFF // SAF Enable bit (SAF disabled)
#pragma config WRTAPP = OFF // Application Block Write Protection bit (Application Block not write protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block not write protected)
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration Register not write protected)
#pragma config WRTSAF = OFF // Storage Area Flash Write Protection bit (SAF not write protected)
#pragma config LVP = OFF // Low Voltage Programming Enable bit (Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.)
//CONFIG5
#pragma config CP = OFF // UserNVM Program memory code protection bit (UserNVM code protection disabled)
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
#include //#include"delay.h"//Call the delay sub-function /*-----------Macro definition--------------*/ #define uint unsigned int #define uchar unsigned char #define V0 RA0 uint i; /*-----------Sub-function declaration--------------*/ /*-----------Main function--------------*/ void main(void) { // The corresponding data direction register is TRISA. // Setting a TRISA bit (= 1) will make the corresponding PORTA an input. // Clearing a TRISA bit (= 0) will make the corresponding PORTA pin an output. TRISA=0xfe; //Set data direction RA7-RA1 as input, RA0 as output // 1 = Port pin is > VIH, i.e. high level; 0 = Port pin is < VIL, i.e. low level PORTA=0X00; //Assign initial value to port /********Timer TMR0 initialization**********/ //The T0CS<2:0> bits of the T0CON1 register are used to select the clock source for Timer0. // Clock Source Selection: 010 = FOSC/4 T0CS2=0; //TMR0 clock source selection bit, TMR0 clock source selects internal instruction cycle (fosc/4) T0CS1=1; T0CS0=0; // There are 16 prescaler options for Timer0 ranging in powers of two from 1:1 to // 1:32768. The prescaler values are selected using the T0CKPS<3:0> bits of the T0CON1 register. T0CKPS3=0; // Pre-scaling 1:1, the corresponding code is 0000 T0CKPS2=0; T0CKPS1=0; T0CKPS0=0; // T0ASYNC: TMR0 Input Asynchronization Enable bit // 1 = The input to the TMR0 counter is not synchronized to system clocks // 0 = The input to the TMR0 counter is synchronized to FOSC/4 T0ASYNC=0; // Synchronous clock mode // T016BIT : Timer0 Operating as 16-bit Timer Select bit // 1 = Timer0 is a 16-bit timer. 0 = Timer0 is an 8-bit timer T016BIT=1; //Count register 16 bits // 2The Timer0 interrupt flag bit (TMR0IF) is set when either of the following conditions occur: // 8-bit TMR0L matches the TMR0H value. 16-bit TMR0 rolls over from 'FFFFh' // The Timer1 module is a 16-bit timer/counter consisting of two 8-bit registers (TMR1H and TMR1L) // which are readable and writable. //16-bit counter register gives initial value, the clock delay of 13 instruction cycles caused by interruption is not considered here TMR0H=(65536-100)/256; // Timing 100us*8 (eighth frequency), the counting register will overflow TMR0L=(65536-100)%256; // There are 16 postscaler options for Timer0 ranging from 1:1 to 1:16. // The postscaler values are selected using the T0OUTPS<3:0> bits of the T0CON0 register. T0OUTPS3 = 0; // Postscaler 0000 = 1:1 Postscaler T0OUTPS2=0; T0OUTPS1=0; T0OUTPS0=0; // Timer0 Enable bit. 1 = The module is enabled and operating // 0 = The module is disabled and in the lowest power mode T0EN=1; // Turn on timer 0 // This overflow sets bit TMR0IF(T0IF). By setting T0IF=1, it indicates that the count register has overflowed. TMR0IF=0; //The overflow interrupt flag of TMR0 is cleared, so that when the count register is full, T0IF generates a rising edge. //If Timer0 interrupts are enabled (TMR0IE bit of the PIE0 register = 1), the CPU will be interrupted TMR0IE=1; // Turn on the enable bit of timer 0 //******************** Open global interrupt settings //Timer T0 is set to enable interrupts, and global interrupts need to be enabled here GIE=1; // Interrupt general enable control position 1 while(1) // infinite loop, after the microcontroller is initialized, it will keep running this infinite loop { } } /*************Interrupt service routine***************/ // void __interrupt(irq(TMR0,TMR1),base(0x100)) timerIsr(void) // You can find in the document that you need to add an interrupt program in the form of void __interrupt() ISR(void) //void interrupt ISR(void)//All interrupts of PIC microcontrollers have such an entry void __interrupt() ISR(void) //All interrupts of PIC microcontrollers are such an entry { // The TMR0 interrupt is generated(T0IF==1) when the TMR0 register overflows from FFFFh to 0000h. // When the counter register changes from all 1 to all 0, T0IF==1. if(TMR0IF==1) //need to further determine whether it is T0 interrupt { //After the timer is interrupted, reset the initial value to prepare for the next interrupt TMR0H=(65536-100)/256; TMR0L=(65536-100)%256; // Bit TMR0IF must be cleared in software by the Timer0 module Interrupt Service Routine // before re-enabling this interrupt. Explains why it is cleared // Overflow interrupt flag cleared. An interrupt will only occur when a rising edge appears on T0IF, so it must be cleared after the interrupt occurs. TMR0IF=0; //Execute the interrupt handler, that is, the interrupt occurs, what function do we want to execute if(++i>250) //2ms interrupt once, then count 250 times to get 500ms { i=0; V0=!V0; // Invert to achieve one second flashing } } }
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