To use a low-cost 32-bit processor, developers face two choices: processors based on the Cortex-M3 core or the ARM7TDMI core. How to make a choice? What are the selection criteria? This article mainly introduces some characteristics of the ARM Cortex-M3 core microcontroller that are different from the ARM7 to help you make a quick choice.
1. ARM implementation method
ARM Cortex-M3 is the latest ARM embedded core based on the ARM7v architecture. It uses Harvard architecture and separate instruction and data buses (under the von Neumann architecture, data and instructions share a bus). In essence, the Harvard architecture is more complex physically, but the processing speed is significantly faster. According to Moore's Law, complexity is not a very important thing, but the increase in throughput is extremely valuable.
ARM's positioning of Cortex-M3 is to provide low-cost, low-power chips to the professional embedded market. In terms of cost and power consumption, Cortex-M3 has quite good performance, and ARM believes it is particularly suitable for the automotive and wireless communication fields. Like all ARM cores, ARM licenses the design to various manufacturers to develop specific chips. So far, many chip manufacturers have begun to produce microcontrollers based on the Cortex-M3 core.
The ARM7TDMI (including ARM7TDMIS) series of ARM cores are also aimed at the same market. This type of core has been around for more than a decade and has driven ARM to become a dominant player in the field of processor cores. Many manufacturers sell processors based on the ARM7 series and other supporting system software, development and debugging tools. In many ways, ARM7TDMI can be called a doer in the embedded field.
2. Differences between the two
In addition to using the Harvard structure, the Cortex-M3 also has other significant advantages: a smaller base core, lower price, and faster speed. Integrated with the core are some system peripherals, such as interrupt controllers, bus matrices, and debug function modules, which are usually added by chip manufacturers. The Cortex-M3 also integrates a sleep mode and an optional full eight-region memory protection unit. It uses the THUMB-2 instruction set to minimize the use of assemblers.
3. Instruction Set
ARM7 can use both ARM and Thumb instruction sets, while Cortex-M3 only supports the latest Thumb-2 instruction set. The advantages of this design are:
● It eliminates the need to switch between Thumb and ARM code. For early processors, this state switching will reduce performance.
● The Thumb-2 instruction set is designed specifically for C language and includes If/Then structures (predicting the conditional execution of the next four statements), hardware division, and local bit field operations.
● The Thumb-2 instruction set allows users to maintain and modify applications at the C code level, and the C code part is very easy to reuse. ● The Thumb-2 instruction set
also includes the function of calling assembly code: Luminary believes that there is no need to use any assembly language.
● Combining the above advantages, the development of new products will be easier to implement and the time to market will be greatly shortened.
4. Interruption
Another innovation of Cortex-M3 is the Nested Vector Interrupt Controller NVIC (Nested Vector Interrupt Controller). Compared with the external interrupt controller used by ARM7, the Cortex-M3 core integrates an interrupt controller that can be configured by chip manufacturers to provide a basic 32 physical interrupts with 8 levels of priority, up to 240 physical interrupts and 256 interrupt priorities. This type of design is deterministic and has low latency, and is particularly suitable for automotive applications.
NVIC uses a stack-based exception model. When processing an interrupt, the program counter, program status register, link register, and general registers are pushed onto the stack, and these registers are restored after the interrupt processing is completed. Stack processing is done by hardware, and there is no need to create stack operations for interrupt service routines in assembly language.
Interrupt nesting is achievable. Interrupts can be changed to use a higher priority than the previous service routine, and the priority state can be changed at runtime. Using tail-chaining continuous interrupt technology only consumes three clock cycles, which greatly reduces latency and improves performance compared to 32 clock cycles of continuous stack push and pop.
If the NVIC has pushed the stack before a higher priority interrupt arrives, it only needs to get a new vector address to service the higher priority interrupt. Likewise, the NVIC does not pop the stack to service the new interrupt. This approach is completely deterministic and has low latency.
5. Sleep
The Cortex-M3 power management solution supports three sleep modes through NVIC: Sleep Now, Sleep on Exit (exit the lowest priority ISR) and SLEEPDEEP modes.
In order to generate regular interrupt intervals, the NVIC also integrates a system tick timer, which can also be used as a heartbeat for RTOS and scheduled tasks. This approach is different from previous ARM architectures in that no external clock is required.
6. Memory Protection Unit
The Memory Protection Unit is an optional component. With this option, memory areas can be associated with application-specific processes according to rules defined for other processes. For example, some memory can be completely blocked from other processes, while other parts of memory can be made read-only for certain processes. It is also possible to prohibit processes from accessing memory areas. Reliability and especially real-time performance are thus significantly improved.
7. Debugging
Debugging and tracing the Cortex-M3 processor system is achieved through the debug access port. The debug access port can be a 2-pin serial debug port (Serial Wire Debug Port) or a serial JTAG debug port (Serial Wire JTAG Debug Port). Through the combination of a series of functions such as Flash slice, breakpoint unit, data watchpoint, trace unit, and optional embedded trace macrocell (Embedded Trace Macrocell) and instruction trace macrocell (Instrumentation Trace Macrocell), various types of debugging methods and monitoring functions can be used in the core part. For example, you can set breakpoints, watchpoints, define default conditions or execute debug requests, monitor stop operations or continue operations. All of these functions have been implemented in ARM architecture products, but Cortex-M3 integrates these functions for the convenience of developers.
8. Scope of application
Although the ARM7 core does not integrate as many peripherals as the Cortex series, a large number of ARM7-based devices, from general-purpose MCUs to application-oriented MCUs, SOCs and even Actel's ARM7-based FPGAs, have more peripherals. There are about 150 MCUs based on the ARM7 core (this number may be higher depending on different statistical methods).
You will find that ARM7 can realize almost all embedded applications, or use customized methods to meet the needs. Based on the standard core, chip manufacturers can add different types and sizes of memory and other peripherals, such as serial interfaces, bus controllers, memory controllers and graphics units, and use different chip packages and provide chip versions with different temperature ranges for industrial, automotive or other demanding fields. Chip manufacturers may also bundle specific software, such as TCP/IP protocol stacks or software for specific applications.
For example, STMicroelectronics' STR7 product line has three main series with 45 members, with different packages and memories. Each series targets a specific application area and has a different set of peripherals. For example, the STR730 family is designed for industrial and automotive applications, so it has an extendable temperature range, includes multiple I/O ports and 3 CAN bus interfaces. The STR710 is aimed at the consumer market and high-end industrial applications. It has multiple communication interfaces, such as USB, CAN, ISO7816 and 4 UARTs, as well as large-capacity memory and an external memory interface.
Chip manufacturers can also choose measures that help developers develop products, such as using ARM's embedded trace macrocell ETM (Embedded Trace Macrocell) and providing development and debugging tools.
Luminary and STMicroelectronics already have chips based on Cortex-M3, and other companies such as NXP and Atmel have also announced the production of such products.
9. Supporting tools
ARM7 applications are already very popular, and it has a lot of third-party development and debugging tool support. There is a list of more than 130 tool companies on the ARM website.
Most vendors offer a basic development board with an interface for downloading programs, debugging tools, and drivers for external devices, including LED status or a single-line display on the screen. Typically, a development kit includes a compiler, some debugging software, and a development board. More advanced kits include a third-party integrated development environment (IDE), which includes a compiler, linker, debugger, editor, and other tools, and may also include emulation hardware, such as a JTAG emulator. The in-circuit emulator (ICE) is one of the earliest and most useful forms of debugging tools, and many vendors provide this interface on the ARM7.
Software development tools cover a wide range: from modeling to visual design to compilers. Many products now also use real-time operating systems (RTOS) and middleware to speed up the development process and reduce the difficulty of development. In addition, there is another very important factor, many developers have rich experience in ARM7 development.
Although there are emerging Cortex-M3 tools, there is obviously still a certain gap. However, the integrated debugging performance of Cortex-M3 makes debugging simple and effective, and there is no need to use an in-circuit emulator ICE.
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