AVR MCU controls RTL8019AS to implement Ethernet interface design

Introduction: This article introduces a method of using AVR microcontroller to realize Ethernet interface circuit, which has few hardware circuits, simple structure and easy use.

With the rapid development of the Internet, various household appliances and instruments are gradually becoming networked in order to share network information resources and remote monitoring, which is also the development trend of embedded systems. Ethernet, as the most widely used local area network, has been increasingly used in the fields of industrial automation and process control. Therefore, for a large number of 8-bit microcontrollers, the realization of Ethernet communication has important practical significance. The Internet access solution based on the 51 core microcontroller is now widely used. Due to the limitation of processing power, it is a bit difficult to realize more complex network transmission and control. This system uses ATMEL's high-performance microcontroller Mega64 and 10Mb/s Ethernet control chip RTL8019AS to realize the Ethernet interface, and introduces in detail the connection of the hardware circuit and the implementation of embedded TCP/IP, so that the microcontroller has the function of accessing the Internet.

1. Hardware circuit design

1.1 Selection of main components

The microcontroller uses the high-performance AVR microcontroller Mega64. AVR is a high-performance 8-bit microcontroller launched by ATMEL that combines the advantages of mature 51 series and PIC series microcontrollers. It has the characteristics of high cost performance, rich resources, fast speed, low power consumption, and convenient development. Mega64 adopts RISC structure and has an operating frequency of up to 16 MHz, which fully meets the requirements of running multiple network protocols. It has 4 KB SRAM and 64 KB FLASH on the chip. The maximum Ethernet data packet is 1 514 B. 4 KB RAM is enough to store Ethernet frames, and 64 KB FLASH is also sufficient for appropriate programs and simple Web Pages, so there is no need to expand resources externally, which greatly simplifies the peripheral circuit and improves reliability.

The Ethernet control chip used is RTL8019AS produced by Taiwan REALTEK Company. This chip integrates the performance of the media access control sublayer (MAC) and the physical layer, which can easily design a system based on the ISA bus. In addition, it is compatible with NE2000, has good software portability, simple interface with the microcontroller, low price and good supply.

The features are as follows:

(1) Complies with EthernetⅡ and IEEE802.3 (10Base5, 10Base2, 10BaseT) standards.

(2) The software is compatible with 8-bit and 16-bit slot NE2000.

(3) Full-duplex, transmission and reception can reach a rate of 10 Mb/s simultaneously.

(4) Built-in 16 KB SRAM for transmit and receive cache, reducing the speed requirements for the main processor.

(5) Supports 8/16-bit data bus, 8 interrupt request lines and 16 I/O base address selections.

(6) Supports UTP, AUI, BNC automatic detection and automatic polarity correction for 10BaseT topology.

(7) Allows 4 diagnostic LED pins to be programmable output.

1.2 Connection between RTL8019AS and MCU

RTL8019AS supports three working modes: the first is the jumper mode, the I/O address and interrupt of the network controller are determined by the jumper; the second is the jumper-free mode, the I/O address and interrupt are determined by the content in the external E2PROM 93C46; the third is the plug-and-play mode (PNP), the I/O address and interrupt are automatically managed and configured by the software or operating system, and the user does not need to intervene too much. Of course, this method consumes system resources. Which mode the network controller adopts is determined by the 65th pin (JP) of RTL8019AS. This system adopts the first jumper mode, and JP should be connected to a high level at this time; the third mode is generally used in PCs, which cannot be realized for 8-bit microcontrollers. Not using the second mode can save a 93C46 chip, which not only simplifies the hardware circuit design, but also reduces the cost.

RTL8019AS has two reset modes: cold reset and hot reset. Applying a high level of more than 1μs to the reset pin of 8019 can achieve cold reset; reading and then writing any reset port of 8019 can achieve hot reset, which is more commonly used in PCs. The reset pin of 8019 can be connected to the reset pin of the microcontroller. When the microcontroller is reset, 8019 is also reset. This can reduce the use of one pin of the microcontroller, but in order to ensure complete reset, hot reset can be performed in the program. However, Mega64 is reset at a low level, while 8019 is reset at a high level. If connected in this way, a NOT gate needs to be added for inversion. Given that Mega64 has more pins, the reset pin of 8019 is connected to an I/O port of Mega64, and the pin performs cold reset on 8019.

Figure 1 shows a partial circuit diagram of RTL8019AS, whose working clock is 20 MHz. When the pin of RTL8019AS is suspended, the input state is low level, because a 100 kΩ pull-down resistor has been connected inside the chip pin. The AEN pin is the I/O port operation enable pin, and grounding makes the address always valid; the IOCSl6B pin is pulled down to ground with a 27 kΩ resistor, and is low level at the reset time, selecting the 8-bit bus mode; the read and write pins IORB and IOWB are connected to the RD and WR pins of the microcontroller respectively; the 8-bit data bus SD0~SD7 is connected to the PA port of the microcontroller; IOSO~IOS3 are I/O base address selection pins, which are set to 300H when suspended, so SA5~SA7, SAl0~SAl9 are grounded, SA8 and SA9 are connected to high level, and the only address lines actually used are SA0~SA4, which are connected to the address lines of the microcontroller; IRQS0~IRQS2 are interrupt selection pins, which are suspended The empty selection interrupt INT0 actually does not use the interrupt, but uses the query mode; the AUI pin is used for the external MAU detection of the AUI interface to decide whether to use the AUI or BNC interface. The BNC interface supports 8-wire twisted pair or coaxial cable, so the pin is left floating to select the RJ45 interface; SMEMRB and SMEMWB are the memory read and write pins. Since we are using the I/O mode read and write network chip, they are connected to a high level; TPIN and TPOUT are differential input and output pins, which are used to receive 10 Mb/s differential Manchester encoded signals from and to the twisted pair, respectively. The RTL8019AS needs to be isolated before it can be connected to the RJ45 interface and then connected to Ethernet. The isolation low-pass filter is 20F001N, which has two transmission transformers inside to transmit signals and suppress noise interference.

2. System Software Implementation

2.1 RTL8019AS address space and registers

The 16 KB RAM inside RTL8019AS is used for transceiver buffer, with the address of Ox4000～0x7FFF. The transceiver buffer is in pages, with 256 B per page, for a total of 64 pages. If a page is not completely filled with data, the next packet data cannot continue to use the page, and can only use a new page. Generally, the first 12 pages are used as the send buffer, divided into two 6-page buffers (because a maximum data packet occupies 6 pages). The two send buffers are used alternately to improve the sending efficiency, and the last 52 pages are used as the receive buffer. The RAM is dual-port and has two sets of buses, one for RTL8019AS to read and write the RAM, that is, local DMA; the other for the microcontroller to read and write the RAM, that is, remote DMA. To receive and send data packets, this RAM must be read and written by DMA.

RTL8019AS has 32-bit I/O address, address offset is 00H～1FH, corresponding to 300H～31FH in this system, among which 00H～0FH are 16 register addresses, registers are divided into 4 pages, only the first 3 pages are compatible with NE2000, the 4th page is defined by RTL8019AS itself, it is invalid for other NE2000 compatible chips, so in order to ensure that the driver is valid for all NE2000 compatible network cards, do not operate the registers on the 4th page. 10H～17H are 8 remote DMA addresses, which can be used as remote DMA addresses, and one of them can be used. The microcontroller accesses the buffer through the read and write data port 10H～17H. 18H～1FH has a total of 8 addresses for reset ports, they have the same function, and one of them can be used for hot reset of RTL8019AS.

2.2 Embedded TCP/IP Implementation

The TCP/IP protocol family is a combination of multiple protocols at different levels, which are divided into link layer, network layer, transport layer and application layer. For 8-bit microcontrollers, it is difficult to implement a complete TCP/IP protocol stack due to its processing speed and storage capacity. Therefore, it is necessary to tailor the protocol according to its characteristics and needs and retain its core part. This system only implements ARP, IP, ICMP, UDP, TCP protocols and is written in C language.

At the link layer, we must first solve the driver problem of RTL8019AS. The driver consists of three parts: Ethernet interface chip initialization program, data transmission program and data reception program. They shield the underlying hardware processing details and provide hardware-independent interfaces to the upper-level software. The driver writes the packaged data to be sent into the chip in the specified format and starts the sending command. 8019 will automatically convert the data packet into a physical frame format for transmission on the channel; conversely, after receiving the physical signal, 8019 restores it to data and stores it in the chip RAM in the specified format for the host program to use. The following is a partial initialization program, which mainly sets some registers. Among them, reg00~regof are macro definitions, representing the register address with an address offset of 00H~0FH in RTL8019AS.