When the AVR is reset, all I/O registers are set to their initial values and the program starts executing from the reset vector. The instruction at the reset vector must be an absolute jump JMP instruction so that the program jumps to the reset processing routine.
There are five reset signal sources for AVR:
Power-on reset: When the power supply voltage is lower than the power-on reset threshold VPOT, the MCU is reset.
External reset: When the low level on the RESET pin lasts longer than the minimum pulse width, the MCU is reset.
Watchdog reset. A reset occurs when the watchdog is enabled and the watchdog timer overflows.
Brownout detection reset: When the brownout detection reset function is enabled and the power supply voltage is lower than the brownout detection reset threshold VBOT, the MCU is reset.
JTAG AVR reset. MCU resets when the reset register is 1.
1. Upper reset
The power-on reset (POR) pulse is generated by the on-chip detection circuit. The POR circuit ensures that the device is reset at power-on. The delay counter is triggered after VCC reaches the power-on threshold voltage. The device remains in the reset state until the counter overflows. When VCC drops, as long as it is below the detection threshold, the RESET signal takes effect immediately.
2. External reset
External reset is generated by a low level applied to the RESET pin. When the reset low level duration is greater than the minimum pulse width, the reset process is triggered, even if there is no clock signal running at this time. When the external signal reaches the reset threshold voltage VRST (rising edge), the tTOUT delay period begins. After the delay ends, the MCU starts.
3. Watchdog reset
When the watchdog timer overflows, a reset pulse with a duration of 1 CK cycle will be generated. At the falling edge of the pulse, the delay timer starts counting tTOUT.
4. Power-off detection reset
The switch of the BOD circuit is controlled by the fuse bit BODEN. When BOD is enabled (BODEN is programmed), once VCC drops below the trigger level (VBOT-, Figure 19), the BOD reset is immediately triggered. When VCC rises above the trigger level (VBOT+, Figure 19), the delay counter starts counting, and once the overflow time tTOUT is exceeded, the MCU resumes operation.
5.JTAG AVR reset
JTAG resets the register mcur, and the MCU is reset when the reset register is 1. The JTAG reset register can be set by the JTAG instruction AVR_RESET, which triggers the MCU reset and sets JTRF. The power-on reset will clear it, and it can also be cleared by writing "0".
6. The MCU control and status register provides information about the reset source that caused the MCU to reset.
The MCU Control and Status Register provides information about the reset source that caused the MCU to reset.
1.Bit 4 – JTRF: JTAG reset flag
The JTAG instruction AVR_RESET can set the JTAG reset register and trigger the MCU reset.
2. JTRF is set. A power-on reset will clear it, and it can also be cleared by writing "0".
Bit 3 – WDRF: Watchdog reset flag
Set when a watchdog reset occurs. A power-on reset will clear it to 0, and it can also be cleared by writing "0".
3.Bit 2 – BORF: Power-off detection reset flag
Set when brownout detection reset occurs. Cleared by power-on reset and can be cleared by writing "0".
4.Bit 1 – EXTRF: External reset flag
Set when external reset occurs. Cleared by power-on reset and can be cleared by writing "0".
5.Bit 0 – PORF: Power-on reset flag
Set when a power-on reset occurs. Can only be cleared by writing "0".
To use these reset flags to identify a reset condition, the user should read the data of this register as early as possible and then reset it. If this register is reset before other resets occur, the source of subsequent resets can be known by checking the reset flags.
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