Design of digital FM radio using single chip microcomputer + CXA1019S + phase-locked loop BU2614

88MHz~108MHz frequency, high-end frequency fmax=108MHz, low-end frequency fmin=88MHz, assuming the maximum value of the capacitor is Cmax, the minimum value is Cmin, the circuit external capacitor Cpx exists

from                                                                                                                                              

have

From the above formula, we have

Let Kd be the band coverage coefficient, then

Kd=

Kd=      Kd2=1.5

It is found that the requirement can be met as long as >1.5, and the variable capacitor is structurally feasible.

   (2) Selection and calculation of input tuning circuit and local oscillator circuit parameters

According to the given data, the capacitance of the M-235 varactor diode is 6p~15p at a bias voltage of 2.68V~9.8V.

• Calculation of local oscillator circuit parameters: The varactor diode is first connected in series with C8 and then in parallel with C7 to form the total oscillation circuit.
  

C (assuming the maximum value of the varactor diode is CVDmax and the minimum value is Cvdmin) is:

∵Cmax=C7+  =29.78p、Cmin=C7+   =20.96p

Kd==1.1         =1.19

∴Kd< The capacitance ratio reaches the coverage factor requirement.

From fmax= , fmin= , we get

L2=0.086uH or 0.087uH

② Tuning circuit parameter calculation: Kd = =108/88=1.23

The range of RC1 is 5p~27p

Cmax=RC1max+C6+=44.78p

Cmin=RC1min+C6+ =13.96p

=1.79

Calculate the inductance L1 of the tuning loop, and the parallel capacitance of loop RC1 and C6 is 15p, the same as the local oscillator loop.

fmax=,L1=0.1uH

fmin=,L1=0.11uH

3.2 Digital Phase-Locked Loop Section

This part is both the focus and the difficulty of the design. We use the phase-locked loop method to construct a digital frequency synthesizer, and use the digital logic circuit inside the phase-locked frequency synthesizer chip BU2614 to reduce the VCO frequency to the phase detector frequency once or multiple times, and then compare it with the reference frequency in the phase detector circuit. The error signal generated is used to control the frequency of the VCO so that it is locked to the stability of the reference frequency inside the chip.

(1) Analysis of BU2614 and peripheral circuits

The BU2614 PLL frequency synthesis chip works in the FM band, has the characteristics of low emission noise, low energy consumption, and built-in high-sensitivity RF amplifier, supporting IF counting function. The application of BU2614 is tuner (small components, cassette radios, radio equipment, etc.), and its characteristics are:

• Built-in high speed preset frequency-dividable 130MHZ voltage controlled oscillator.

• 75KHZ reference crystal oscillator can ensure low transmission noise.

• Low current consumption, (4mA when operating, 100mA when PLL is off).

• Provide the following 7 stepping frequencies: 25KHZ, 12.5KHZ, 6.25KHZ, 3.125KHZ, 5.3KHZ.

• Internal frequency measurement counter.

• Unlock detection.

• Three output ports (open drain)

• Serial data input (CE, CLK, DA)
  

The principle block diagram is shown in Figure 3:

The local oscillator frequency and tuning frequency of CXA1019S are controlled by BU2614 phase-locked frequency synthesis chip and external

                                 image 3

围电路控制。该方案的显著优点是频率稳定度高,当压控振荡器参数发生变化时，可自动跟踪捕捉，使频率重新稳定。通过对可编程分频系数进行预置和步进，可以在好的环路性能下实现电台的程控搜索。BU2614锁相频率合成芯片工作于FM波段，具有低噪声，低能耗的特点，并且内部带有高灵敏度RF放大器，支持IF计数功能。电路如图-4所示：

                                 Figure 4

The working principle of the peripheral circuit of BU2614: Pin 5 receives the serial data of the microcontroller, which provides the frequency division coefficient N for the feedback frequency FMOSC of pin 12. The internal standard frequency is determined by the different values ​​of R0, R1, and R2 in the serial data bit. This design selects R0 as "1", R1 as "1", and R2 as "1". The standard frequency is 25KHZ and compared with the frequency FMOSC/N. The PD outputs a phase comparison signal. According to the different states of the PD output end, the corresponding DC voltage is obtained from the low-pass filter. This voltage is added to the variable capacitance diode in the tuning circuit and the local oscillator circuit of the CXA1019S radio, so that the changes in the tuning frequency and the local oscillator frequency resonate with the carrier signal received from the antenna BPF and receive the radio station, realizing the electrical tuning function. The local oscillator frequency is fed back to BU2614 through capacitive coupling to lock the frequency.

(2) Composition and working principle of phase-locked loop

This loop is a phase negative feedback control system. It consists of four basic components: phase detector PD, loop filter (LF), voltage controlled oscillator (VCO) and program divider (N).

Components. As shown in Figure 5:

                            Figure 5

When the frequency f0 of the voltage-controlled oscillator changes for some reason, a phase change will inevitably occur accordingly. This phase change is compared with the stable phase of the reference crystal oscillator (corresponding to the frequency fr) in the phase detector, so that the phase detector outputs an error voltage Vd(t) proportional to the phase error. After passing through a low-pass filter, the slowly changing DC component V0(t) is extracted. V0(t) is used to control the value of the voltage-controlled element in the voltage-controlled oscillator (the capacitance of the varactor diode), and this voltage-controlled element is a component of the VCO oscillation circuit. As a result, the change in the capacitance of the voltage-controlled element pulls the output frequency fv of the VCO back to a stable value. In this way, the output frequency stability of the VCO is determined by the reference crystal oscillator, and the loop is in a locked state.

A. Phase detector PD

The phase detector is a key component in the phase-locked loop. It has many forms, but the phase detectors used in frequency synthesizers are mainly sine wave phase detectors and pulse sampling and holding phase comparators. Since the pulse sampling and holding phase comparator has a small output ripple voltage and a phase comparison range of 360°, the pulse sampling and holding phase comparator is often used as a phase detector in digital phase-locked loops. Its function is to compare the phase of the input signal voltage and the output signal voltage, and generate a voltage Vd(t)≈Kd(θv-θr) proportional to the phase difference between the two signals.

BU2614 generates a 75KHz reference frequency through an external crystal oscillator and sends it to the phase detector. The feedback VC (FM local oscillator frequency) is also sent to the phase detector for comparison after passing through the divider to generate a voltage proportional to the phase difference and send it to the LF link.

B. Loop Filter

Loop filter, also known as low-pass filter, is commonly used in the form of RC filter, passive proportional integral filter, active proportional integral filter. Its function is to filter out useless combined frequency components and other interference components in the output voltage of the phase detector to ensure the required performance of the loop and improve the stability of the loop.

This design uses an RC filter (the circuit is shown in Figure-6).

                             Figure 6

The output of the RC filter is amplified by Q2 and then output from the VD terminal to the variable capacitance diodes of the tuning circuit and the local oscillator circuit. The output waveform of the loop filter is shown in Figure 7:

                                 Figure-7

    The advantages of using RC filters are simple structure, stable performance and easy debugging. According to the requirements of the topic, in order to ensure that all radio stations can be searched, the standard frequency fr is set to 25KHz, and the local oscillator output frequency fo is 98.7 ~ 118.7MHz. The frequency division method can be used. The frequency division ratio N of the programmable frequency divider of the loop can be calculated by the following formula:

N=fo/fr

The frequency division ratio of BU2614 varies within the following range:

The average division ratio is:

VCO is a local oscillator voltage-controlled oscillator. The actual measured VCO gain is:

The gain of the internal phase detector of BU2614 is:

The total loop gain is:

The natural frequency is:

The damping coefficient is:

Take a typical design:

It can be obtained that R=10 and C=0.001 in the circuit .

C. Voltage Controlled Oscillator (VCO)

A voltage-controlled oscillator uses a voltage-controlled element as a frequency control device in an oscillation circuit. The voltage-controlled element is generally a varactor diode, and its capacitance is controlled by the input voltage vc(t). When vc changes, the oscillation frequency ωv changes. Within a certain range, there is a linear relationship between ωv and vc. Within the linear range, this linear curve can be expressed by the following equation:

             ωv(t)= ω0 + KV vc(t)

In this design, the DC voltage output by the low-pass filter controls the tuning and local oscillator varactor diodes to make the tuning frequency and local oscillator frequency change accordingly. The varactor diode is a crystal diode with a large PN junction capacitance variation range. When the varactor diode is working, a reverse bias VD is added to both ends; when VD changes, its equivalent capacitance CD also changes accordingly. When UD increases, CD decreases; when UD decreases, CD increases. The relationship between VD and CD is:

Where: C0 is the PN junction capacitance when bias voltage VD=0; C0 is the contact potential difference of PN junction (about 0.7V for silicon tube and about 0.2-0.3V for germanium tube); VD is the external DC bias, n is the junction capacitance variation index, which depends on the structure and impurity distribution of PN junction. For abrupt junction n=1/2, for gradual junction n=1/3; for super-variable junction n=2 or higher. It can be seen from the formula that at zero bias, the junction capacitance decreases exponentially. Its characteristics are shown in Figure-8: