Modem communication for microcontrollers

　　We often see articles about PC MODEM communication, but articles about MCU MODEM communication are rare. Now I will write down my personal experience of MCU MODEM communication for your reference.

　　To write MODEM communication for a microcontroller, you must have two background knowledge, one is the AT command set, and the other is the Universal Asynchronous Receiver Transmitter (UART).

　　1.AT command set

　　The following introduces the AT commands involved in my communication program example.

　　Dn: dial command. This command makes the MODEM immediately go off-hook and dial the number that follows. The D command is a basic dial command. It can be modified by other commands to form operations such as when and how the MODEM dials.

　　T: Audio dialing. For example, ATDT2245879, where 2245879 is the phone number.

　　P: Pulse dialing. For example, ATDP2245879, where 2245879 is the phone number.

　　,: Standard pause. We often need to pause when dialing an external line, and wait until we hear the secondary dial tone (external line) before dialing the subsequent number. The default pause time is 2s (seconds), which is specified by the S8 register.

　　Sn: indicates the register inside the MODEM.

　　S0: Automatic answering. If the MODEM is required to have the automatic answering feature, the S0 register of the MODEM should be set to non-zero in advance.

　　S8: Comma dial modifier pause time. This register determines the time the MODEM should pause when it encounters a comma (,) in dialing.

　　2. Universal Asynchronous Receiver Transmitter UART

　　A deep understanding of the internal structure of UART and the meaning of each bit of the internal register, as well as a detailed understanding of the process of data transmission and reception, will help you write efficient and stable programs. Taking GM16C550 as an example, we will introduce the registers you need to know when writing basic communication programs. The actual ADDRESS is determined by the specific wiring. Table 1 is an introduction to the GM16C550 registers.

　
Table 1 GM16C550 registers 

　　(1) Baud rate divisor latch (LSB, MSB)

　　Before communication, some parameters need to be initialized, and the baud rate is the first item that should be considered. This register is a 16-bit register, divided into the lower 8 bits (LSB) and the upper 8 bits (MSB) register.

　　When LCR.7=1, and A2A1A0=000/001, the microcontroller accesses the baud rate divisor latch LSB/MSB. The recommended operating frequency of GM16C550 is 1.8432MHz . This frequency divided by 16 is the baud rate clock frequency, which is used to control the speed of sending and receiving data. The following is the calculation formula for the baud rate divisor latch value:

　　Baud rate divisor latch value = operating frequency / (16 × expected baud rate) = 1843200 / (16 × expected baud rate)

　　Table 2 shows the commonly used baud rates and baud rate divisor latch values.

　　Table 2 Baud rate divisor latch

　　MOV DPTR,#LCR ; Divisor lock enable

　　MOV A,#80H

　　MOVX @DPTR, A

　　MOV DPTR, #LSB; baud rate is 9600baud

　　MOV A,#0CH

　　MOVX @DPTR, A

　　INC DPTR

　　CLR A

　　MOVX @DPTR, A

　　Figure 1 is the wiring diagram of GM16C550 and RS232.

    Figure 1 GM16C550 and RS232 wiring diagram

　　(2) Receive buffer register and send holding register (transmit and receive holding register)

　　When LCR.7=0 and A2A1A0=000, the microcontroller accesses the receive buffer register (RHR) for read operations and the microcontroller accesses the transmit holding register (THR) for write operations.

　　(3) Interrupt enable register

　　When LCR.7=0 and A2A1A0=001, the microcontroller accesses the interrupt enable register (IER).

　　IER.0=1, enable receiver data ready interrupt.

　　IER.1=1, enable interrupt when the transmit holding register is empty. That is, when a byte is moved from the transmit holding register to the shift register, an interrupt is generated, so that the transmit holding register can receive the next byte.

　　IER.2=1, indicating that receiving error information or interruption of discontinuity condition is allowed.

　　IER.3=1, MODEM status change interrupt.

　　IER.4~7, not used, set to zero.

　　MOV DPTR,#IER

　　MOV A,#01H

　　MOVX @DPTR,A

　　(4) FIFO control register

　　Selection of data transmission and reception mode. GM16C550 provides two modes: FIFO and DMA. Among them, DMA has two modes: DMA mode 0 and DMA mode 1. My example uses the default DMA mode 0. Interested friends can try other modes, which will not be explained here.

　　(5) Interrupt status register

　　Several interrupts have been introduced above. They generate interrupts under their own conditions. UART will output a high-level interrupt request signal to trigger the same interrupt request. In order to determine which interrupt it is, the ISR should also be detected, as listed in Table 3.

　　Table 3 Interrupt Status Register

      ISR.0=1, indicating no interrupt occurs. 
ISR.4~5 are not used. 
ISR.6~7, when using FIFO receiving and sending mode, these two bits are set to 1; otherwise, they are set to 0.

(6) Line control register
 LCR.0～1, indicates the byte length when sending and receiving, as listed in Table 4.
 LCR.2, this bit and LCR.0～1 together define the length of the stop bit, as listed in Table 5.

　　LCR.6=1 means that interruptions are allowed, that is, the transmitter register is allowed to maintain an empty state for more than a complete frame time.

　　LCR.7 is used to distinguish whether the access to the divisor latch register is access to the receive buffer/transmit hold and interrupt enable register. MOVDPTR, #LCR; the communication transmission length is 8 bits, the stop bit is 1,; even parity

　　MOVA,#1BH

　　MOVX @DPTR,A

　　(7) MODEM control register

　　This is a register for MODEM and peripheral interface.

　　When MCR.0=1, the chip pin DTR is forced to be 0;

　　When MCR.0=0, the chip pin DTR is forced to be 1.

　　When MCR.1=1, the chip pin RTS is forced to be 0;

　　When MCR.1=0, the chip pin RTS=1 is forced.

　　When MCR.2=1, force the chip pin OP1=0;

　　When MCR.2=0, the chip pin OP1 is forced to be 1.

　　When MCR.3=1, force the chip pin OP2=0;

　　When MCR.2=0, the chip pin OP2 is forced to be 1.

　　When MCR.4=1, it is in loop return mode and can be used for chip self-test.

　　The other bits are reserved.

　　MOVDPTR, #MCR; The DTR and RTS pins of the asynchronous serial port chip send out a logic low level

　　MOVA, #03H

　　MOVX @DPTR,A

　　(8) Line status register

　　LSR.0: When the received byte in the receive shift register is completely moved to the receive buffer register, this bit is set to 1. If this register is read, this bit is cleared.

　　LSR.1: When a runaway error occurs, this bit is set to 1. This bit is cleared to 0 when the register is read.

　　LSR.2: When a parity error occurs, this bit is set to 1. When this register is read, this bit is cleared to 0.

　　LSR.3: When the stop bit is incomplete, lost, or empty, this bit is set to 1. This bit is cleared when reading this register.

　　LSR.4: When the receive register detects that the empty state has lasted for a complete frame transmission time, this bit is set to 1. This bit is cleared when reading this register.

　　LSR.5: This bit is set to 1 when the transmitted byte is moved from the transmit holding register to the transmit shift register.

　　LSR.6: This position is 1 when both the transmit holding register and the transmit shift register have no used bytes.

　　LSR.7: This position is set to 1 when one of the parity error, frame format error, and space number error occurs.

　　Setdata:

　　MOV DPTR,#LSR

　　MOVX A,@DPTR

　　JNB ACC.5,Setdata

　　MOV A,DataNumber; DataNumber records the number of characters sent

　　MOV DPTR,#AtCommand; AtCommand defines the starting address of AT command parameters

　　MOVC A,@A+DPTR

　　MOV DPTR,#THR ；Send holding register

　　MOVX @DPTR,A

　　INC DataNumber

　　MOV A,DataNumber

　　CJNE A,#0BH,Setdata ;Send 11 characters

　　AtCommand：DB “A”，“T”，“S”，“0”，“=”，“2”，“S”，“8”， “=”，“5”，0DH

　　(9) MODEM status register

When MSR.0~3=1, it means that the status of the four input signals of the MODEM control logic have changed 　　　since the last time the microcontroller read the MSR register.

　　When MSR.0 = 1, the Clear to Send signal (CTS) has changed.

　　When MSR.1=1, the data set ready signal (DSR) has changed.

　　When MSR.2=1, the ringing signal (RI) has changed.

　　When MSR.3=1, the carrier signal (DCD) has changed.

　　The four bits MSR.4~7 reflect the current status of the four input signals of the MODEM control logic respectively.

　　When MSR.4=1, the clear to send signal (CTS) is valid.

　　When MSR.5=1, the data set ready signal (DSR) is valid.

　　When MSR.6=1, the ringing signal (RI) is valid.

　　When MSR.7=1, the carrier signal (DCD) is valid.

　　(10) Scratchpad register

　　Can store user information.

　　With the above knowledge, you can easily write the MODEM communication program of the microcontroller. Now you can organize the scattered things.

　　GM16C550 chip initialization module

　　Init_16C550:

　　MOV DPTR,#LCR ; Divisor lock enable

　　MOV A,#80H

　　MOVX @DPTR, A

　　MOV DPTR, #LSB; baud rate is 9600baud

　　MOV A,#0CH

　　MOVX @DPTR, A

　　INC DPTR

　　CLR A

　　MOVX @DPTR, A

　　MOV DPTR, #LCR; Communication transmission length is 8 bits, stop; bit is 1, even parity

　　MOV A,#1BH

　　MOVX @DPTR, A

　　MOV DPTR, #MCR; DTR of asynchronous serial port chip. RTS; pin sends out logic low level

　　MOV A,#03H

　　MOVX @DPTR,A

　　MOV DPTR,#IER

　　MOV A,#01H

　　MOVX @DPTR,A

　　Use interrupt method to receive data

　　Interrupt2:

　　PUSH ACC

　　PUSH DPH

　　PUSH DPL

　　PUSH PSW

　　MOV DPTR,#RHR ; receive data

　　MOVX A,@DPTR

　　……………………

　　POP PSW

　　POP DPL

　　POP DPH

　　POP ACC

　　RARELY

　　So far, a small single-chip MODEM communication system has been completed. The application of error detection registers, MODEM status registers, etc. is not fully covered due to space limitations. Interested friends can give it a try, and then you will have a deeper understanding of MODEM communication.