MSP430 MCU 16-bit timer Timer_A operation

/**********（一）Timer A comparison mode*************/ 
int main( void ) 
{ 
WDTCTL=WDTPW+WDTHOLD; //Turn off watchdog 
BCSCTL1 =CALBC1_1M Hz ; //Set DCO to 1MHZ 
DCOCTL =CALBC1_1MHZ; 

P1DIR |= BIT0; //LED enable 
TACTL=TASSEL1+TACLR; //Timer A clock source is SMCLK, and clear TAR 
CCTL0 |= CCIE; //CCR0 interrupt enable 
CCR0 =50000; //Count value is 50000 SMCLK cycles 
TACTL |= MC1; //Start timer A in continuous counting mode 
_BIS_SR(GIE+CPUOFF); 
return 0; 
} 
#pragma vector = TIMERA0_VECTOR //ccr0 interrupt service 
__interrupt void ta0_isr(void) 
{ 
P1OUT ^= BIT0; //LED flip 
CCR0 +=50000; //Timing compensation 
} 


/********** (II) Timer A capture mode************/ 
volatile unsigned int cap_value; //Store the difference between two capture values 
​​int main( void ) 
{ 
volatile unsigned int first_value,second_value,n; 
WDTCTL=WDTPW+WDTHOLD; //Turn off watchdog 
BCSCTL1 =CALBC1_8MHZ; //Set DCO to 1MHZ 
DCOCTL =CALBC1_8MHZ; 
BCSCTL1 |=DIVA_3; //ACLK input eight- 
frequency division do //Wait for crystal oscillator to stabilize 
{ 
IFG1 &=~OFIFG; 
for(n=5000;n>0;n--); 
} while(OFIFG&IFG1); 
TACCTL2=CM1+CCIS_1+CAP; //Capture mode, capture rising edge, capture internal ACLK 
TACTL=TASSEL_2+MC_2+TACLR; //Timer clock source is SMCLK, start continuous counting, clear TAR 
TACCTL2 &=~CCIFG; //Clear CCR2 flag 
while(!(CCIFG&TACCTL2)); //Check CCR2 flag 
first_value=TACCR2; //The first captured value is stored in first_value 
TACCTL2 &=~CCIFG; //Clear the flag of CCR2 
while(!(CCIFG&TACCTL2)); //Check the flag of CCR2 
second_value=TACCR2; //Store the second captured value in second_value 
TACCTL2 &=~CCIFG; //Clear the flag of CCR2 
TACCTL2 &=~MC1; //Turn off timer A 
cap_value=(second_value-first_value); 
return 0; 
} 



/************（三）Timer PWM  output program********************/ 
int main( void ) 
{ 
WDTCTL=WDTPW+WDTHOLD; //Turn off watchdog 
BCSCTL1 =CALBC1_1MHZ; //Set DCO to 1MHZ 
DCOCTL =CALBC1_1MHZ; 

TACTL=TASSEL1+TAR; //SMCLK is the clock source, clear TAR 
CCR0=512; //Set PWM period 
CCTL1 |=OUTMOD_7; //CCR1 Output is reset/set mode 
CCR1=384; //PWM duty cycle setting of CCR1 
CCTL2 |=OUTMOD_7; //CCR2 output is reset/set mode 
CCR2=128; //PWM duty cycle setting of CCR2 
P1SEL |=BIT2+BIT3; //TA1,TA2 output function 
P1DIR |=BIT2+BIT3; 
TACTL |=MC0; //Start timer A up-counting mode 
_BIS_SR(CPUOFF); 
return 0; 
}