After searching for a long time, I still couldn't find the frequency setting for Proteus simulation of LPC2106~~
Also, I still don't understand Startup.s~~
So I don't know how it is set up.
But let's sort out the PLL first~~
PLL (Phase Locked Loop):
Register Description:
a. PLLCON register (PLLCON - 0X301FC080)
b. PLLCFG register (PLLCFG - 0XE01FC084)
c. PLLSTAT register (PLLSTAT—0XE01FC088)
d. PLLFEED register (PLLFEED - 0XE01FC08C)
PLL Interrupt
The PLOCK bit in the PLLSTAT register is connected to the interrupt controller. This allows the PLL to be turned on by software and connected to other functions without waiting for the PLL to lock. When an interrupt occurs, the PLL can be connected and the interrupt can be disabled.
PLL Mode
PLL and Power-down Mode
PLL frequency calculation
Process for Determining PLL Settings
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