Systick: System heartbeat timer, providing system beat
It can be used as an independent delay timer in bare metal programs
. Purpose:
1. Generate the clock beat of the operating system
2. Facilitate program porting between different processors
The SysTick timer is bundled in the NVIC, exception number 15
3. As an alarm to measure time,
but when the processor is halted during debugging, the SysTick timer will also suspend operation
It has four registers
STK_CSR, 0xE000E010 -- control register
STK_LOAD, 0xE000E014 -- reload register
STK_VAL, 0xE000E018 -- current value register
STK_CALRB, 0xE000E01C -- calibration value register When
the clock source of stm32
selects the external clock source, the Systick clock is HCLK /8
When the core clock source is selected, the Systick clock is HCLK.
Delay programming principle:
The Systick timer is a 24-bit down counter. After setting the initial value and enabling it, it will reduce the counter by 1 every system clock cycle.
When the count reaches 0, it will automatically reload the timing initial value from the RELOAD register. As long as the enable bit in the SysTick control and status register is not cleared, it will never stop.
Delay programming steps
1. Calculate how many clock cycles fac_us are needed to generate 1us;
2. Calculate the value of the RELOAD register
, which is the number of clock cycles required to generate the corresponding delay
RELOAD=fac_us * nus
3. Turn on the count
4. Loop to detect the flag bit when the count reaches 0;
5. Clear the counter and turn off the timer
==========================================
SysTick exception configuration steps
1 Configure the three registers CTRL//LOAD/VAL,
2 Initialize the clock used by SysTick,
3 Clear the current value of the system and load the reload value,
4 Enable SysTick and enable SysTick to respond to interrupts
=========================
When the SysTick timer counts to 0, the COUNTFLAG bit will be set; the following method can clear it:
1. Read the SysTick control and status register (STCSR)
2. Write any data to the SysTick current value register (STCVR)
Only when the VAL value is 0, the counter will automatically reload RELOAD
======================
Library function
uses ST's function library to use systick's method, strictly follow the following order:
1. Call SysTick_CounterCmd() -- disable the SysTick counter
2. Call SysTick_ITConfig () -- disable the SysTick interrupt
3. Call SysTick_CLKSourceConfig() -- set the SysTick clock source.
4. Call SysTick_SetReload() -- set the SysTick reload value. 5. Call SysTick_ITConfig
() -- enable SysTick interrupt
6. Call SysTick_CounterCmd() -- turn on the SysTick counter Systick
interrupt service function void SysTick_Handler
(void);
=== ...
void delay_init(u8 SYSCLK) //The system clock is 72MHz, SYSCLK=72
{
SysTick->CTRL &= 0xfffffffb ; //bit2 is cleared to 0, that is, the configuration selects the external clock
fac_us=SYSCLK/8; //Hardware frequency division by 8, the value obtained by fac_us is used for the following clock function
fac_ms =(u16)fac_us*1000;
}
void delay_us(u32 nus) //nus is 10us
{
u32 temp;
SysTick->LOAD = nus*fac_us; // If the delay is 10us, it is 10*9=90, which is loaded into the load register
SysTick->VAL=0x00; //The counter is cleared to 0, because when the currrent field is manually cleared, load will automatically reload into VAL
SysTick->CTRL = 0x01; //Configure the exception to take effect, that is, an exception notification will be issued when the counter counts down to 0
do
{
temp = SysTick->CTRL; //After the time is up, this bit will be set to 1 by hardware, but will be automatically cleared to 0 after being queried
}
while(temp & 0x01 && !(tmep &(1<<16))); //Query
SysTick->CTRL = 0x00; // Turn off the counter
SysTick->VAL = 0x00; // Clear val
}
//This while loop determines if Systick is still in the Enable state and the counter has not reached 0,
then it will keep looping to write the current SysTick->CTRL register value into the variable temp and continue the next judgment.
When Systick is Disabled or the counter reaches 0, the loop stops.
There is another point to note:
The LOAD register is the maximum value of 24 bits 0xffffff
, so the maximum delay calculation formula is
nms<=0xffffff*8*1000/SYSCLK (SYSCLK unit Hz),
so the maximum value of nms is 1864.135ms, that is, 1864 milliseconds
Previous article:A preliminary study on the STM32F4 clock system (Part 1)
Next article:stm32 notes: RCC clock experiment
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