You can get a general understanding of the interrupt priority through my introduction first, and we will understand it in detail when we apply it in practice later.
When talking about the background of interruption, we only talked about the examples of watching TV and boiling water, but there are more complicated things in real life. For example, I am watching TV and a phone call comes in. I want to enter the "interrupt" program to answer the phone. While answering the phone, I hear the sound of boiling water, and the "interrupt" of boiling water also occurs. We must put down the phone in our hands, turn off the gas first, then come back to answer the phone, and finally watch TV after the phone call. Here, a priority problem arises.
There is another situation. When we are watching TV, we hear the sound of boiling water. The "interrupt" of boiling water occurs. We have to enter the "interrupt" program to turn off the gas. While turning off the gas, the phone rings. At this time, our way of dealing with it is to turn off the gas first, then answer the phone, and finally watch TV.
From these two processes, we can draw a conclusion that once the most urgent thing happens, no matter which "program" we are in at the time, we must deal with the most urgent thing first, and then solve other things after that. Sometimes it is the same in our MCU program. There are general urgent interrupts and special urgent interrupts. This depends on the specific system design. This involves the concepts of interrupt priority and interrupt nesting. In this chapter, we will briefly introduce the relevant registers without routine description.
There are two types of interrupt priority, one is preemption priority and the other is inherent priority. We will introduce preemption priority first. Let's look at Table 6-4 and Table 6-5.
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|
symbol | -- | -- | PT2 | PS | PT1 | PX1 | PT0 | PX0 |
Reset value | -- | -- | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | symbol | describe |
---|---|---|
7 | -- | reserve |
6 | -- | reserve |
5 | PT2 | Timer 2 interrupt priority control bits |
4 | PS | Serial port interrupt priority control bit |
3 | PT1 | Timer 1 interrupt priority control bits |
2 | PX1 | External interrupt 1 interrupt priority control bit |
1 | PT0 | Timer 0 interrupt priority control bits |
0 | PX0 | External interrupt 0 interrupt priority control bit |
Each bit of the IP register represents the preemption priority of the corresponding interrupt. The reset value of each bit is 0. When we set a bit to 1, the priority of this bit is higher than that of other bits. For example, after we set the PT0 bit to 1, when the MCU is executing in the main loop or any other interrupt program, once the timer T0 is interrupted, as a higher priority, the program will immediately run to the T0 interrupt program for execution. Conversely, when the MCU is executing in the T0 interrupt program, if other interrupts occur, it will continue to execute the T0 interrupt program until the interrupt program in T0 is executed, and then execute other interrupt programs. When
entering the low-priority interrupt for execution, if a high-priority interrupt occurs again, it will immediately enter the high-priority interrupt execution. After processing the high-priority interrupt, it will return to process the low-priority interrupt. This process is called interrupt nesting, also known as preemption. So the concept of preemption priority is that a high-priority interrupt can interrupt the execution of a low-priority interrupt, thus forming a nest. Of course, conversely, a low-priority interrupt cannot interrupt a high-priority interrupt.
Since there is a preemption priority, there is also a non-preemption priority, also known as the inherent priority. The last column in Table 6-3 gives the inherent priority. Please note that in the interrupt priority numbering, the smaller the number, the higher the priority. From the table, you can see that there are 6 levels of priority from 1 to 6. The difference between the priority here and the preemption priority is that it does not have the preemptive feature, that is, even if a high-priority interrupt occurs during the execution of a low-priority interrupt, the high-priority interrupt can only be responded to after the low-priority interrupt is executed. Since it cannot be preempted, what is the use of this priority? The
answer is arbitration when multiple interrupts exist at the same time. For example, multiple interrupts occur at the same time. Of course, the probability of this happening is very low, but another situation is much more common. For some reason, we temporarily disable the general interrupt, that is, EA=0. After executing a section of code, we enable the general interrupt again, that is, EA=1. Then, during this period of time, it is very likely that multiple interrupts will occur, but because the general interrupt is disabled, they will not be responded to at that time. When the general interrupt is enabled again, they will request a response at the same time. Obviously, there must be a sequence at this time. This is the role of non-preemptive priority. As shown in Table 6-3, whoever has the highest priority will respond first, and then queue up according to the number and get a response in turn.
The coordination of preemptive priority and non-preemptive priority can make the microcontroller interrupt system work in an orderly manner, without endless nesting, and can ensure that urgent tasks are given priority when necessary. In the subsequent learning process, the interrupt system will be with us like a shadow, and its presence can be seen everywhere. With the deepening of learning, I believe that your understanding of it will be more in-depth.
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