The ARM architecture supports implementations across multiple performance points and has become the dominant architecture in many market segments. The ARM architecture supports a very wide range of performance points, allowing for very small ARM processor implementations and very efficient high-level design implementations that take advantage of the latest microarchitectural technologies. Implementation size, performance, and low power are key features of the ARM architecture.
ARM has developed architectural extensions to provide support for Java acceleration (Jazelle®), security (TrustZone®), SIMD, and Advanced SIMD (NEON™) technologies. The ARMv8-A architecture adds cryptographic extensions as an optional feature. The
ARM architecture is similar to Reduced Instruction Set Computing (RISC) architectures in that it includes the following typical RISC architectural features:
Unified register file load/store architecture, where data processing operations operate only on register contents and not directly on memory contents.
Simple addressing mode, all load/store addresses are determined only by register contents and instruction fields.
Enhancements to the basic RISC architecture allow ARM processors to achieve a good balance of higher performance, smaller code size, lower power consumption, and smaller silicon area.
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