What are the models of automotive electronic MCU and main chips?

1 Introduction 
With the enhancement of DSP chip functions, it is no longer used for simple digital signal processing tasks, but is widely used as an MCU to control various resources on the board and complete tasks such as acquisition, calculation, control, and communication. Especially when TCP/IP or other complex communication protocols are used, it is difficult to schedule tasks without a real-time multitasking operating system. μC/OS-II is a preemptive real-time multitasking operating system with open source code. It always executes the highest priority task in the ready state and supports a variety of commonly used inter-process communication mechanisms such as Semaphore, Mailbox, Message Queue, etc. It is the first choice for most high-reliability embedded devices. 

2 Introduction to the development environment 
APCI5096 is a DSP target board developed by Beijing Kangtuo Industrial Computer Company, mainly used for sampling and processing analog signal quantities. The target board uses TMS320VC32 as the CPU and has complete input/output functions. It can realize 30-channel, 16-bit, 300KSPS analog input. The compiler used for debugging is TI's Code Composer 'C3x-'C4x, version 4.10. 

3 Porting process 
3.1 μC/OS-II system structure 
Figure 1 illustrates the hardware and software architecture of μC/OS-II. The application software is at the top level of the entire system and is only associated with μC/OS-II processor-independent code and μC/OS-II application-related code. This ensures the reusability of the application software. 

μC/OS-II processor-independent code provides μC/OS-II system services. Using these API functions, applications can perform memory management, inter-task communication, and create and delete tasks. μC/OS-II application-related code provides the reduction of μC/OS-II itself, and can set the number of tasks and the size of the task stack according to actual needs. 

Most of the μC/OS-II code is written in ANSI C language, so μC/OS-II has good portability. However, it is still necessary to write some processor-related code in C and assembly language. The code related to the processor needs to be rewritten in the porting work, including three files: OS_ CPU.H, OS_ CPU_ CC, OS_ CPU_ AASM. The focus is on the initialization of the task stack and the adjustment of the stack pointer when switching tasks. 

3.2 OS_ CPU.H 
has different word lengths in different processors, so a series of data types must be redefined to ensure the correctness of the porting. In the OS_ CPUH file, the following should be completed: redefinition of data types, definition of stack data types, definition of stack growth direction, method of turning on/off interrupts in critical sections, and macro definition of task switching function OS_TASK_SW. 

(1) Declaration of data types: In VC33, all integer data (char, short, int, long) are of the same type and are represented by 32 bits. Floating-point data (float, double) are of the same type and are represented by 32-bit single-precision floating-point numbers in VC33. Redefinition of data types: 
typedef unsigned char BOOLEAN; 
typedef unsigned char INT8U; 
typedef signed char INT8S; 
typedef float FP32; 
typedef double FP64; 

(2) The data width of the VC33 stack is 32 bits, and the data types redefined above are used to ensure the consistency of the stack data types. Stack data type declaration: 
typedef INT32U OS_ STK; 

(3) When μC/OS-II accesses the critical section of the code, it is necessary to disable interrupts first, and re-enable interrupts after the access is completed. μC/OS-II uses two macros to disable and enable interrupts, and switches interrupts through the interrupt enable bit of the status register. 
cregister unsigned int ST； /＊Declare CPU internal registers＊/ 
＃define OS_ ENTER_ CRITICAL() asm(“ANDN 2000H, ST "); /＊Clear interrupt enable bit＊/ 
＃define OS_ EXIT_ CRITICAL() asm(“OR 2000H, ST "); /＊Set interrupt enable bit＊/ 

3.3 OS_ CPU_ CC 
The OSTaskStkInit() function is mainly completed in the OS_ CPU_ CC file, and the other five functions can be ignored. The OSTaskStkInit() function completes the initialization of the task stack, making the structure of the task stack look like an interrupt occurred during the task execution and all registers were saved to the stack. Different compilers have different stacking methods when calling functions, such as: the order in which parameters and return addresses are pushed into the stack, the order in which parameters are pushed into the stack, whether parameters are saved in registers or stacks, etc. In the specific implementation, it is also necessary to adjust according to the requirements of the compiler. 

The stack rule for calling a CCS function is: push parameters from left to right first, then push the function return address. According to this rule, the initial structure of the task stack is designed as shown in Figure 2. VC33 has a total of 28 registers. All registers should be pushed into the stack in the program, which is implemented in OSTaskStkInit: 

{ 
OS_ STK *stk; /*Define the data structure of the stack*/ 
opt=opt; 
stk=(OS_ STK *)ptos; /*Load the top pointer of the stack*/ 
*stk=(OS_ STK)pdata; /*Push parameters into the stack*/ 
*++stk=(OS_ STK)task; /*Task return address*/ 
*++stk=(OS_ STK)task; /*Interrupt return address*/ 
*++stk=(OS_ STK)0x2000; /*Status register, open interrupt*/ All other CPU registers are pushed into the stack and initialized to 0 
} 

3.4 OS_ CPU_ A.ASM 
in OS_ CPU_ A. The ASM file requires the user to write four simple assembly language functions: OSStartHighRdy(), OSCtxSw(), OSIntCtxSw(), and OSTickISR(). These four functions have exactly the same common parts: register push and register pop. Just follow the stack structure designed above. Note that R0 to R7 of VC33 are extended precision registers with 40 bits. Both stack push and stack pop need to be completed in two sentences, as follows: 
Stack push: Pop: 
PUSH R0 POPF R0 
PUSHF R0 POP R1 

The OSIntCtxSw function has a special part. This function is used to switch tasks when returning from an interrupt. Since an interrupt has occurred before calling the OSIntCtxSw function, the interrupt service routine has saved the CPU registers to the stack, so the registers are no longer saved here. At the same time, the stack pointer must be adjusted to remove some unnecessary contents in the stack, and then all registers are popped out of the stack. Since this function is the only compiler-related function in μC/OS-II, multiple task switches must be used after porting to check whether the stack pointer is adjusted correctly. 

3.5 Clock interrupt source initialization 
μC/OS-II also requires the user to provide a clock resource for time delay and confirmation timeout. According to the hardware settings of APCI5096, the clock resources need to be set in three files. 

(1) OS_ CPU_ AASM: 
In APCI5096, timer 1 of VC33 has been used for the frequency measurement channel, so the unoccupied timer 0 is used to generate a timer interrupt. The implementation method is to place a jump instruction at the interrupt vector entry of TINT0 to jump to the self-written OSTickISR. 
sect “TINT0_ vector" 
TINT0 br _ OSTickISR 

(2) 
After the CMD file jumps TINT0 to OSTickISR, the vector entry address of TINT0 should be specified. VC33 on the APCI5096 board is set to BootLoader mode, in which the entry address of TINT0 is fixed at 0x809FC9. The SECTIONS section of the CMD file is specified as follows: 
TINT0_ vector: 0x809FC9 

(3) MainC file 
μC/OS－II requires the user to initialize the beat interrupt in the first task started by μC/OS－Ⅱ after OSStart() is run. Write a function TimerInit() and call it at the beginning of the first task to complete the initialization of timer 0. In the function, TIM0_ XXX represents the address of the three registers of timer 0. After completing the setting of timer 0, the global interrupt and clock interrupt must be enabled. 

{ 
＊TIM0_PRD= 0x7530; /＊Set the cycle to 1KHZ＊/ 
＊TIM0_CNT=0; 
＊TIM0_CTL=0x2C1; /＊Start the clock＊/ 
ST|=0x2000; /＊Open the interrupt＊/ 
IE|=0x100; /＊Open the clock interrupt＊/ 
} 

4 Test, write drivers and applications 
After completing the above work, you need to test whether the transplantation is successful. During the initial test, you can run the operating system itself and schedule some simple tasks and clock beat interrupt tasks. Mainly test the correctness of the system itself. If the debugging is successful, you can continue to develop drivers and add applications on it. 

References 
1. Jean J. Labrosse, translated by Shao Beibei. μC/OS-II-Real-time Embedded Operating System with Open Source Code. Beijing: China Electric Power Press, 2001. 
2. Texas Instruments. TMS320C3x User's Guide. http://www.ti.com.cn/support/ tech.doc.asp，1997. 
3. Texas Instruments. TMS320C3x Assembly Language Tools User's Guide. http:// www.ti.com.cn/support/techdoc.asp，1997. 
4. Texas Instruments. TMS320C3x Optimizing C Compiler User's Guide. http:// www.ti.com.cn/support/techdoc.asp，1997.Asynchronous 




transceiver TL16C554 and its application in inertial navigation system 

FAN Lei, MIAO Lingjuan, GUO Zhenxi 
(Beijing Institute of Technology, Beijing 100081) 


Abstract The internal structure, main features and working principle of the four-channel asynchronous transceiver TL16C554 chip are introduced, as well as the basic idea of ​​the hardware interface circuit and software implementation of its application in inertial navigation system. 
Keywords Universal asynchronous receiver and transmitter(UART), TL16C554, Single chip processor 1 Introduction With the development of inertial navigation 

technology, inertial navigation system needs to receive more RS-232, RS-422, RS-485 serial port signals 
such as  GPS 
,  Beidou  dual  -star, altimeter, etc. In this way, the original serial port channel of the inertial navigation system is not enough to receive so many serial port signals, so serial port expansion is needed. The asynchronous transceiver TL16C554 chip produced by Ti is a good choice for serial port expansion. It has four channels and can communicate with four serial signals, solving the problem of the shortage of serial signal interfaces in the original inertial navigation system. Each channel has two 16-byte FIFO (First In First Out) buffers, one of which is used to receive data and the other is used to prepare data for transmission. When working in FIFO mode, it is not necessary to generate an interrupt for each frame of data received or sent, thereby reducing the number of interrupts and improving the efficiency and reliability of receiving and sending serial signals.  2 Main features The  main features of TL16C554 are as follows: 










It consists of four TL16C550 asynchronous communication units with logic control; 
The baud rate can reach up to 1M, and it has a programmable baud rate generator, which is convenient for flexible selection of data transmission and reception frequency; 
It has a 16-byte transmission and reception FIFO buffer; 
It has independently controllable transmission, reception, line status and MODEM status interrupts; 
It has a full-duplex reception and transmission line, which can independently control reception and transmission; 
Comprehensive line status reporting function; 
Fully graded interrupt system control; 
Three-state TTL level output. 

3 Internal structure and working principle 
The four-channel asynchronous transceiver integrated chip TL16C554 has two package forms: 64-pin TQFP and 68-pin PLCC. Among them, the 68-pin PLCC package supports 68 (Motorola) mode. Therefore, it can be easily interconnected with Motorola microprocessors. The internal structure of TL16C554 is shown in Figure 1, and its pin description is shown in Table 1. [page]

3.1 System I/O bus 
The data lines (D0-D7) of TL16C554 can be directly connected to the lower eight bits of the CPU's data bus. They are the data input and output channels of UART. The read and write operations are distinguished by the data input and output selection lines. These selection lines can realize bidirectional communication between UART and CPU. TL16C554 can also freely choose 16 mode (Intel bus) or 68 mode (Motorola bus). It has four serial interfaces, each with its own independent transceiver function. 

3.2 Clock 
The reference clock of TL16C554 can be provided externally or generated internally by a crystal oscillator. 

3.3 Read/control logic 
The communication control between UART and CPU is realized through a group of signal lines, which include reset control RESET, chip enable, register enable interrupt request INT (A-D), read data valid and write data valid, etc. 

3.4 MODEM Logic Control 
The MODEM control logic is mainly used to complete the interface communication between UART and RS-232C. These signals are driven by EIA drivers and meet the RS-232C standard. The MODEM control logic signals include the following eight types: 
RX (A-D) Serial input, equivalent to receiving data RxD; 
TX (A-D) Serial output, equivalent to sending data TxD; 
(A-D) Data device ready input; 
(A-D) Data terminal ready output; 
(A-D) Request to send input; 
(A-D) Clear to send input; 
(A-D) Carrier signal detection input; 
(A-D) Ring indication input. 

3.5 Main registers 
The main registers in TL16C554 include baud rate divisor register, line control register (LCR), line status register (LSR), interrupt enable register (IER), interrupt identification register (IIR), MODEM control register (MCR), MODEM status register (MSR), transmit holding register (THR) and receive buffer register (RHR). 

4 Interface between TL16C554 and MCU 
In the inertial navigation system, the 80C196 MCU is used to frequently receive serial signals such as GPS, dual-star, and altimeter through the asynchronous transceiver TL16C554. In addition, other tasks such as temperature control and communication with the host computer must be completed. Therefore, if the query method is used to receive serial signals, it will undoubtedly waste a lot of CPU time and increase the burden on the CPU, which is obviously not feasible. The interrupt method does not occupy CPU time, and the use of a 16-byte FIFO buffer can reduce the number of interrupts and improve the real-time and reliability of data reception. Therefore, the interrupt method is selected in this system. 

Figure 2 shows the interface circuit between TL16C554 and MCU 80C196, which can simultaneously receive four RS-232 or RS-485 serial signals. The four serial signals enter the TL16C554 after level conversion. When each serial port of the TL16C554 receives and sends data, an interrupt signal will be triggered. Each interrupt signal in the four serial port signals will cause an external interrupt of the microcontroller through EXINT, and the microcontroller sends and receives data through the interrupt service program. When the interrupt service program receives an interrupt, it only knows that the TL16C554 has generated an interrupt, but does not know which serial port has generated the interrupt. In order to determine the interrupt port, P0.0~P0.3 must be checked, and different interrupt ports must be processed differently. It should be noted that since the EXINT interrupt request signal is triggered by the rising edge of the pulse, rather than the high level trigger. Therefore, at the beginning of the interrupt service program, P1.0~P1.3 must be set low, and other interrupts must be shielded during the interrupt service. After the interrupt service is completed, P1.0~P1.3 must be set high to open other interrupts. In this way, during the processing of one serial signal interrupt service, the omission of other serial signal interrupt request services can be prevented. The addressing of the internal registers of the TL16C554 is completed through the address lines AD12-AD14 chip select. Software flow chart 3 is as follows: 

Experiments show that the above hardware and software design can realize the reliable and timely asynchronous transmission and reception service of four serial signals, which can meet the requirements of the inertial navigation system. 

References 
1 TI TL16C554 Data Sheet. 
2 Liu Leshan, Ye Jizhong, Ye Yongjian. Principles and Applications of Microcomputer Interface Technology. Huazhong University of Science and Technology Press. 
3 Sun Hanfang. Intel 16-bit Single-Chip Microcomputer. Beijing University of Aeronautics and Astronautics Press. 






Several Implementation Methods and Programming Examples of MCU Serial Asynchronous Communication 

Jiang Jianwu, Wang Huaiyi, Zhang Jianmin 
(School of Computer Science and Technology, Soochow University, Suzhou 215006) 



Abstract Taking Motorola M68HC08 series MCU as the implementation carrier, a method of using one MCU to realize multiple serial communication ports is proposed, that is, using the SCI module of the MCU itself to realize serial asynchronous communication, using the I/O port to simulate serial asynchronous communication, and using the input capture and output comparison functions of the timer module to simulate serial asynchronous communication; the characteristics of these implementation methods are analyzed and compared, and specific implementation subroutines and application methods are given. 
Keywords: Serial Asynchronous Communication, M68HC08 Series MCU, Input Capture, Output Compare 

Implementation and Programming Example of Serial Asynchronous Communication For MCU 
Jiang Jianwu Wang Yihuai Zhang Jianmin 
(College of Computer Science and Technology of Soochow University, Suzhou 215006) 

Abstract In this paper, implementations of several serial asynchronous communication interfaces on a chip of MCU have been mentioned based on Motorola M68HC08 MCUs. They are SCI interface module, I/O interface module, and timer interface module. At the same time ,the Characteristics of these three implementations are analyzed and compared each other. The programming examples and application method are given. 
Keywords Serial Asynchronous Communication, M68HC08 MCUs, Input Capture,Output Compare 


1 Introduction 
In the application system of embedded MCU, it is inevitable to communicate with various devices, especially serial asynchronous communication is widely used. Therefore, serial asynchronous communication is particularly important as one of the basic functions of MCU. However, most MCU chips only provide one SCI module, which cannot meet the requirement of communicating with two or more devices at the same time. This paper will explore the basic solution to this problem based on a specific MCU. As the world's largest MCU manufacturer, Motorola has introduced mature Flash memory technology and phase-locked loop technology into microcontrollers and launched a new generation of 8-bit microcontrollers, the M68HC08 series, which have the advantages of high speed, powerful functions, low power consumption and low price. This series began to enter the Chinese market in early 2000. Currently, more than 60 varieties have been launched, including AZ, MR, GP, JL, JK and other sub-series, suitable for different embedded application fields. In 2002, a low-cost Q series for small applications was launched. Since Motorola's new series of MCUs incorporate many of the latest MCU manufacturing technologies and have a full range of varieties, new models will continue to be launched, and they will surely be widely used in my country [1]-[3]. Based on the M68HC08 series MCU, this paper discusses the methods of using a single MCU to implement multiple serial communication ports. They are: (1) Using the programmable SCI module provided by the MCU itself. Most of the specific models of the M68HC08 series MCU provide one SCI module, and some provide two SCI modules. (2) Using the basic input and output ports to use scanning mode to simulate serial asynchronous communication. (3) Using the input capture and output comparison functions of the timer module, the interrupt mode is used to simulate serial asynchronous communication. The characteristics of these implementation methods are analyzed and compared, and a complete subroutine of the implementation method is given, which has clear entry and exit points and can be used directly by readers. 

2 Basic principles of serial asynchronous communication 
In asynchronous transmission, each byte of 8-bit data is encoded as a pulse sequence. The start pulse and the end pulse are added before and after it to form a complete pulse sequence for transmitting one byte of data. Before transmission, the line is idle and maintains a high level state; during transmission, it starts with a start pulse (usually a low level), the pulse length is the time to transmit one bit of data, and then the data pulse sequence follows. After the data pulse sequence is transmitted, one or more end pulses (usually a high level) are sent; after the transmission is completed, the line is idle again and maintains a high level state. When the next low-level pulse arrives, it indicates the start of the next data transmission. If parity check is used in transmission, a parity bit is added after the data pulse, and then the end bit is sent [4]. See Figure 1. 

3 Serial asynchronous communication method 1 - SCI module method 
In the M68HC08 series chips, the basic serial communication function is implemented through the SCI module. The system provides 7 related registers: 3 control registers (SCC1, SCC2, SCC3), 2 status registers (SCS1, SCS2), 1 data register (SCDR), and 1 baud rate register (SCBR). The specific definitions of the above registers are introduced in various books introducing the M68HC08 series microcontrollers. The following will take the example of sending and receiving one bit of data at a baud rate of 19200bps to introduce how to use the SCI module to implement serial asynchronous communication [5]. 

(1) Port address definition 
SCC1 EQU 0013 ;SCI control register 1 
SCC2 EQU 0014 ;SCI control register 2 
SCBR EQU 0019 ;SCI baud rate register 
SCS1 EQU 0016 ;SCI status register 1 
SCDR EQU 0018 ;SCI data register 

(2) Serial port initialization 
1) Define the baud rate, assuming it is defined as 19200: 
LDA #% 00000101 ;For example: fBUS = 2.4576MHz, 
;take PD = 1 (i.e. SCP1, SCP0 = 00) 
STA SCBR ;BD = 2 (i.e. SCR2, SCR1, SCR0 = 001), 
;then the baud rate = 2457600 / (64 * 1 * 2) = 19200 

2) Write control word to SCI control register 1 (SCC1), set data length, output format, select wake-up method, checksum, etc.: 
LDA #% 01000000; D6 (ENSCI) = 1, enable SCI. 
STA SCC1; that is, normal code output, 8-bit data, no checksum, etc. 

3) Write control word to SCI control register 3 (SCC3), set interrupt reception or query reception, set value to allow transmission and reception, etc.: 
LDA #% 00001100; D3 (TE) = 1, enable transmitter; D2 (RE) = 1, enable receiver. 
STA SCC2; other bits are 0, query mode for 

sending and receiving (3) Sending and receiving a bit of data 
The following will use the query mode to receive and send a bit of data: 

1) To send a piece of data, first determine whether it is possible to send a number to the data register SCI through D7 (SCTE) of the status register SCS1. If SCTE=1, the number can be sent. The following program will send the number in A: 
BRCLR 7,SCS1,*; SCTE=0?, if it is 0, wait for 
STA SCDR; SCTE=1, data can be sent, that is, the number can be sent to SCDR. 

2) To receive a piece of data in query mode, first determine whether there is data to be received through D5 (SCRF) of the status register SCS1. If SCRF=1, there is data to be received. The following program waits for a number from the serial port and puts it into A after receiving it: 

BRCLR 5,SCS1,*; SCRF=0?, if it is 0, wait 
LDA SCDR; SCRF = 1, data can be received and sent to A. [page]

4 Serial asynchronous communication method 2 - I/O simulation method 
The basic principle of using the I/O port to use the scanning method to realize serial asynchronous communication is: according to the baud rate of the transmission and the MCU bus frequency, the time required to transmit one bit of data is calculated, and each bit of data sent or received from the I/O port is limited to this time. The insufficient part is supplemented by delay, so that all the data to be transmitted can be sent out or received back one by one. In this process, it is particularly important to accurately calculate the time for transmitting one bit of data, which is the prerequisite for successfully realizing this working method. At the same time, the calculation of the execution time of each instruction in the receiving and sending process must also be very accurate, because it involves how long it takes to delay after all instructions are executed to meet the transmission time of one bit of data. Any error in the above two calculations will have a cumulative effect in the implementation process, that is, when transmitting one bit, due to the error of over-counting or under-counting one or two cycles, it will cause dozens, dozens or even larger errors after transmitting a large amount of data. These errors may not be felt as errors for some low-speed devices. However, once the baud rate requirement is slightly higher, this error will be noticeable. Especially for some high-speed devices, the time to transmit one bit is only about 20 cycles. As long as the error is about 10 cycles, the transmission will shift, resulting in overall transmission errors. 

The following will take the example of sending and receiving one bit of data under the conditions of 2.4756MHz as the bus frequency (fBUS) and the baud rate of 38400bps to specifically introduce the working method of using the I/O port to use the scanning method to simulate serial asynchronous communication. The transmission method uses a start bit, eight data bits, an end bit and no parity check. 

(1) The time used to transmit one bit of data (in cycles c) 
T =fBUS/B=2457600/38400=64(c) 

(2) Receiving one byte of data 
In order to make the received data accurate, it is necessary to ensure that the signal is stable when receiving the data, so the data is obtained in the middle of the transmission instead of at the beginning of the data transmission. After receiving the low level of the start bit, the first data is received after 1.5 transmission bits and sent to Buf1.7; then the cycle is repeated 8 times, and one data is received after each transmission bit, Buf1 is logically shifted right by one bit, and the received data is sent to Buf1.7 (except the last time); the first seven bits of the eight bits of data received in the cycle are data bits, which together with the one bit of data received previously constitute a byte of data to be received, and the last bit is the end bit. If the end bit is 1, the reception is correct; otherwise, the reception is wrong. After a byte of data is successfully received, the received data is stored in Buf1. 

Receive one bit of data at 38400bps baud rate Subroutine: 
Receive1Byte: 
; Open one byte of stack space as loop variable 
PSHA 
LDA #!8 
; Set the initial value of the loop variable (4c) 
STA 1,SP 
; Delay 1.5 send bit 
; Use 38400 baud rate (1.5 send bit = 96c) 
; 13 * 5 + 29 = 94, other 15 
LDA #!13 ; (2c) 
JSR Delay ; (4c) 
NOP 
NOP 
; Delay 
Receive1Byte1: 
LSR Buf1 ; Shift right one bit (4c) 
; Determine the received data bit = 0 to MTxD_0 (5c) 
BRCLR MTxD, MSerialPort, MTxD_0 
; Received data bit = 1 (4c) 
BSET 7, Buf1 
JMP MTxD_EXIT ; (3c) 
MTxD_0: 
; Received data bit = 0 (4c) 
BCLR 7, Buf1 
NOP ; Add 3 NOP instructions for  NOP ; It has the same cycle 
as the JMP instruction NOP ; above  MTxD_EXIT:  ; Delay 1 send bit  ; Use 38400 baud rate (1 send bit = 64c)  ; 6 * 5 + 34 = 64, the other 21  LDA #! 6 ; (2c)  JSR Delay ; (4c)  LDA 1, SP ; (2c)  DECA ; (1c)  STA 1. SP  CMP #! 0  ; Determine whether the 8 data bits are received (5c)  ; If not completed, continue receiving  BNE Receive1Byte1  ; Determine if the end bit is 0 to exit, if it is 1, set the flag bit (5c)  BRCLR MTxD, MserialPort, Rece1_exit  ; Set the reception success flag to 1 (4c)  BSET 1, Flag  Rece1_exit:  PULA ; Pop the opened one-byte stack space  RTS ;(4c)  Before calling the above receiving program each time, you need to scan MserialPort. MTxD continuously. When it is 0, it means that data has been sent. At this time, you can call the above receiving program to complete the reception of one bit of data. The following is a program fragment that calls Receive1Byte to receive 1 byte of data in scanning mode.  LDX # 00 ;(2c)  ReceiveNByte1:  AIX #!1 ;(1c)  CPHX # 40FC  BHI ReceiveNByte_Exit;(3c)  BRSET MTxD,MserialPort,ReceiveNByte1;(5c)  PSHH ;(2c)  PSHX ;(2c)  JSR Receive1Byte ;(4c)  PULX ;(2c)  PULH ;(2c)  BRA ReceiveNByte1 ;(4c)  ReceiveNByte_Exit: 



































In order to prevent the program from being in a dead waiting state when running, the program will be considered to have no data sent after a period of time, and the receiving program will be exited. 

(3) Send a byte of data. 
Before calling, put the data to be sent into register A. Before sending each byte of data, first send a high level on the signal line, then send a low level as the start bit; then use the circular right shift method to send eight bits of data to the signal line in sequence; finally send an end bit. The time for sending each bit of data starts from the time the data signal is sent to the signal line. 

Send one bit of data at 38400bps baud rate Subroutine: 
Send1Byte: 
; Define the sending port as output (4c) 
BSET MRxD,MDDR_MSerialPort 
; 1) Clear the original data on the line 
; Send port high level (4c) 
BSET MRxD,MSerialPort 
PSHA ; (2c) 
; Use 38400 baud rate (2 send bits = 128c) 
; Delay 2 send bits 
; 19 * 5 + 7 = 102, the other 24 
LDA #! 19 ; (2c) 
JSR Delay ; (4c) 
NOP 
NOP 
PULA ; (2c) 
LDX # 09 ; (2c) 
; 2) Send the start low level signal 
; low level (start bit) (4c) 
BCLR MRxD,MSerialPort 
Send1Byte0: 
PSHA ; (2c) 
; Use 38400 baud rate (1 send bit = 64c) 
;/Delay 1 send bit 
; 6*5+7=37, other 25 
LDA #!6 ;(2c) 
JSR Delay ;(4c) 
NOP 
NOP 
PULA ;(2c) 
;When HX is 0, 1Byte data sending ends 
DECX ;(1c) 
BEQ Send1Byte1 ;(3c) 
;3)Send 8-bit data signal 
;Send the next bit 
RORA ;Least significant bit－－C(1c) 
BCC Send0 ;Send bit is 0(3c ) 
;Send bit=1(4c) 
BSET MRxD,MSerialPort 
BRA Send1Byte0 ;(3c) 
Send0: 
;Send bit=0(4c) 
BCLR MRxD,MSerialPort 
BRA Send1Byte0 ;(3c) 
;4)Send a bit to end the high level signal, this bit takes 0.5 sending bit, which  leaves enough time for the subsequent operation
of calling this subroutine to receive a bit of data and continue to receive continuous data 
. 
Send1Byte1: 
;Send port high level (4c) 
BSET MRxD,MSerialPo