Design of IP Phone Based on DSP

introduction

The traditional telephone network transmits voice signals in a circuit-switched manner, and the basic bandwidth required is 64kbit/s. According to statistics, in normal calls, only about 40% of the time is in the voice period, and the rest of the time the circuit is idle, and the network bandwidth utilization rate is not high. With the continuous development of computer technology, especially the continuous improvement of the Internet, data communication based on packet switching has become the most important communication method. In order to transmit voice on an IP-based packet network, the analog voice signal must be specially processed so that the processed signal can be suitable for transmission on a connectionless packet network. This is packet voice technology. This article introduces an IP phone design based on TMS320VC5409 .

G..728 Coding Standard

Voice coding technology is one of the core technologies of IP telephony, and the quality of coding is directly related to the call quality of IP telephony.

The speech coding algorithm of the G.728 standard is a 16kbit/s vocoder coding standard, which uses low-delay codebook excited linear prediction (LD-CELP) technology. The linear predictor uses feedback-type backward
adaptive technology. The predictor coefficient is updated based on the speech quantization data of the previous frame. Therefore, the algorithm delay is short, which is 0.625ms, equivalent to 5 sampling points, which is also the frame length of G.728. Due to the use of feedback-type adaptive technology, the predictor coefficient does not need to be transmitted. The only thing that needs to be transmitted is the excitation signal quantization value, that is, the codebook index value. The codebook of the G.728 standard speech coding algorithm has a total of 1024 vectors, and the index needs to occupy 10 bits, so its bit rate is 10/0.625=16kbit/s.

The main features of G.728 standard speech coding are:

*The algorithm delay is short, only 0.625ms;
*The coding delay is less than 2ms;
*The transmission bit rate is 16kbit/s;
*The MOS value is 4.173, achieving the quality of long-distance communication.

Since the G.728 standard voice coding algorithm has a short delay and the voice transmission bit rate can meet the application requirements of IP phones, we choose the G.728 standard voice coding algorithm as the coding algorithm for IP phones.

Hardware system design

The main function of the system is to make full use of the high-speed data processing capability of DSP and reduce the burden of computer CPU; the voice input and output systems are also separated separately, so that data can be better transmitted with DSP, unnecessary intermediate links can be reduced, and time delay can be reduced. Finally, the data is transmitted to the computer through the high-speed PCI bus. The overall block diagram of the system is shown in Figure 1, and the specific functions of each module are shown in Table 1.

Figure 1 System Block Diagram

Communication between DSP and FLASH

Since the I/O interface voltage of TMS320VC5409 is 3.3V, while the interface voltage of AM29F101B is 5V, voltage conversion is required in the interface part, and the chip select signal () and output enable signal () of AM29F101B need address decoding. All these tasks are completed by a complex programmable logic device (CPLD).

Since the interface speed of AM29F101B is slow, the interface between TMS320VC5409 and AM29F101B must insert software wait states. The specific number of software wait states to be inserted can be calculated from the data sheet or obtained by experiment during machine tuning. The interface circuit between TMS320VC5409 and AM29F101B is shown in Figure 2.

Figure 2 DSP and FLASH interface circuit

Communication between DSP and ADC and DAC

The G.728 standard speech coding algorithm selected by this system requires a sampling rate of 8kHz, so here we require the ADC and DAC to have a maximum sampling rate or conversion time of no less than 8kHz.

According to the characteristics of the speech signal, we choose TI's TLC32044 chip, which is a chip that integrates ADC and DAC functions. Its maximum conversion rate is 19.2kHz, the number of conversion bits is 14 bits, the input voltage band is adjustable, there is a standard synchronous serial port, and there are input filters and output reconstruction filters, which can save the design of analog filters. The interface circuit between TMS320VC5409 and TLC32044 is shown in Figure 3.

Figure 3 Interface circuit between DSP, DAC and ADC

Figure 4 Interface circuit between DSP and dual-port RAM

Figure 5 PC19025 dual-port RAM interface circuit

Communication between DSP and dual-port RAM

In order to reflect the advantage of PCI bus speed, we use the faster dual-port RAM CY7C133-25, with a maximum transfer rate of 25ns. The address mapping of the dual-port RAM in the DSP data space is 8000H-87FFH.

What needs to be emphasized here is the BUSY signal of the dual-port RAM. We do not use this signal because we operate different parts of the dual-port RAM separately, so any possible conflicts are avoided. Therefore, the BUSY signal is omitted and the BUSY signal is left floating. The voltage conversion and address decoding of the circuit are also completed by the CPLD.

Communication between PCI9052 and dual-port RAM

The task of DSP is to complete the encoding and decoding of speech, and then exchange data with the computer through the PCI bus. Here we use the PCI interface chip PCI9052. So the problem becomes the communication between DSP and PCI9052. A dual-port RAM (capacity of 2k×16bit) is used between DSP and PCI9052 for data exchange.

Since PCI9052 has 5 local address spaces and 4 local device chip select signals, the wiring becomes quite simple. We only need to map the dual-port RAM to one of the local address spaces, and then use one of the chip select signals to connect to the dual-port RAM, and finally connect the PCI9052 read and write signals (R/W) to the dual-port RAM's R/W and. This eliminates the need for peripheral logic circuits such as address decoding.

Software system design

The algorithm that the IP telephone system needs to implement
is the voice coding algorithm, and it also needs to complete data exchange with the computer. The main function of the software part is to use the TCP/IP protocol in the embedded operating system to package the voice coding signal to be transmitted, and then transmit the data to the receiver through the Internet through the network card on the computer, and restore the received TCP/IP packet to the original voice coding signal, and finally transmit it to the DSP through the PCI bus for voice decoding.

Conclusion

Practice has proved that the main advantages of this system design are that it does not require high computer hardware, has a fast processing speed, the voice input and output systems are separately integrated, and the signal-to-noise ratio (SNR) is high, which makes it quite applicable and worth promoting.