Solving the electromagnetic compatibility problem of DSP design-EEWORLD

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DSP is a complex, diverse, and multi-system digital and analog hybrid system. Therefore, the interference from external electromagnetic radiation and the interference between internal components, subsystems, and transmission channels on DSP and its data information has seriously threatened its working stability, reliability, and safety [1]. According to statistics, DSP accidents caused by interference account for about 90% of its total accidents. At the same time, DSP inevitably radiates electromagnetic waves to the outside, causing interference, obstruction, or damage to human bodies and equipment in the environment. And with the improvement of DSP computing speed, the signal bandwidth that can be processed in real time has also greatly increased, and its research focus has also shifted to high-speed and real-time applications. However, it is precisely because of this that its electromagnetic compatibility problem has become more and more prominent. This article discusses the electromagnetic compatibility problem of DSP.
2 Electromagnetic compatibility of DSP hardware
Electromagnetic compatibility (EMC) includes two aspects of system emission and sensitivity. If the interference cannot be completely eliminated, it should be minimized. If a DSP system meets the following three conditions, the system is electromagnetically compatible. (1) No interference to other systems; (2) Insensitive to the emissions of other systems; (3) No interference to the system itself.
2.1 Main sources of interference in DSP
Electromagnetic interference is generated through conductors or through radiation. Many electromagnetic emission sources, such as light, relays, DC motors and fluorescent lamps, can cause interference. AC power lines, interconnect cables, metal cables and internal circuits of subsystems can also radiate or receive unwanted signals. In high-speed digital circuits, clock circuits are usually the largest source of broadband noise. In fast DSP systems, these circuits can generate harmonic distortion signals up to 300MHz, and they should be removed from the system. In digital circuits, the most susceptible are reset lines, interrupt lines and control lines.
2.2 Conducted interference in DSP
One of the most obvious propagation paths that can cause circuit noise is through conductors. A wire passing through a noisy environment can pick up noise and send it to another circuit to cause interference. Designers must avoid wires picking up noise. For example, after noise enters the circuit through the power line, if the power supply itself or other circuits connected to the power supply are interference sources, the power line must be decoupled before it enters the circuit.
2.3 Common impedance coupling problems in DSP
Common impedance coupling occurs when currents from two different circuits flow through a common impedance. The voltage drop on the impedance is determined by the two circuits. The ground currents from the two circuits flow through the common ground impedance, the ground potential of circuit 1 is modulated by ground current 2, and the noise signal or DC compensation is coupled from circuit 2 to circuit 1 through the common ground impedance .
2.4 Radiation coupling problems in DSP
Coupling generated by radiation is generally called crosstalk. Crosstalk is caused by the electromagnetic field generated when current flows through the conductor, which induces transient currents in adjacent conductors.
2.5 Radiation phenomena in DSP
There are two basic types of radiation: differential (DM) and common mode (CM). Common mode radiation or monopole antenna radiation is caused by unintentional voltage drops, which raises all ground connections in the circuit above the system ground potential. In terms of electric field magnitude, CM radiation is a more serious problem than DM radiation. To minimize CM radiation, practical design must be used to reduce common mode current to zero.
2.6 Factors Affecting EMC
(1) Voltage: The higher the power supply voltage, the greater the voltage amplitude and the more emissions, while low power supply voltage affects sensitivity.
(2) Frequency: High-frequency signals and periodic signals will generate more radiation. In high-frequency digital systems, current spikes will be generated when the device is in the switching state; in analog systems, current spikes will also be generated when the load current changes.
(3) Grounding: In circuit design, nothing is more important than using a reliable and perfect ground connection method. Among all EMC problems, most problems are caused by improper grounding. There are three signal grounding methods: single-point, multi-point and mixed. Single-point grounding can be used when the frequency is less than 1MHz; in high-frequency applications, multi-point grounding is best used; mixed grounding is a combination of single-point grounding for low frequencies and multi-point grounding for high frequencies. However, the ground loops of high-frequency digital circuits and low-level analog circuits must not be mixed.
(4) PCB design: Proper printed circuit board (PCB) wiring is essential to prevent electromagnetic interference.
(5) Power supply decoupling: When the device switches, transient currents are generated on the power line, which must be attenuated and filtered out. Transient currents from high di/dt sources cause ground and trace "emission" voltages. High di/dt generates a large range of high-frequency currents, which excite components and cables to radiate. The current changes and inductance flowing through the wires will cause voltage drops. Reducing the inductance or the change in current over time can minimize this voltage drop.
2.7 Hardware noise reduction technology of DSP
2.7.1 Noise reduction technology in board structure and line arrangement
(1) Use ground and power planes; (2) The plane area should be large to provide low impedance for power decoupling; (3) Minimize surface conductors; (4) Use narrow lines (4 to 8 mils) to increase high-frequency damping and reduce capacitive coupling; (5) Separate digital, analog, receiver, and transmitter ground/power lines; (6) Separate circuits on the PCB according to frequency and type; (7) Do not cut the PCB. The traces near the cut may cause unwanted loops; (8) Using a stacked structure is the best preventive measure for most signal integrity and EMC problems. It can effectively control impedance, and its internal routing can form an easy-to-understand and predictable transmission line structure. And the traces between the power supply and the ground layer should be sealed; (9) Keep the spacing between adjacent excitation traces larger than the width of the traces to minimize crosstalk; (10) The clock signal loop area should be as small as possible; (11) High-speed lines and clock signal lines should be short and directly connected; (12) Sensitive traces should not be parallel to traces that transmit high-current fast switching conversion signals; (13) There should be no floating digital inputs to prevent unnecessary switching conversions and noise generation; (14) Avoid power supply under crystal oscillators and other inherently noisy circuits (15) The corresponding power, ground, signal and return traces should be laid out in parallel to eliminate noise; (16) The clock line, bus and chip enable terminal should be separated from the input/output lines and connectors; (17) The routing clock signal and I/O signal should be in an orthogonal position; (18) To minimize crosstalk, the traces should be crossed at right angles and the ground wires should be scattered; (19) Protect key traces (use 4 mil to 8 mil traces to minimize inductance, the route should be close to the floor layer, the sandwich structure should be between the board layers, and each side of the sandwich layer should have ground).
2.7.2 Noise reduction method using filtering technology
(1) Filter the power lines and all signals entering the PCB, and decouple at each point pin of the IC with a high-frequency, low-inductance ceramic capacitor (0.1 mF for 14 MHz and 0.01 mF for more than 15 MHz); (2) Bypass all power supply and reference voltage pins of the analog circuit; (3) Bypass fast switching devices; (4) Decouple the power supply/ground at the device leads; (5) Use multi-stage filtering to attenuate multi-band power supply noise; (6) Install the crystal oscillator embedded in the board and ground it; (7) Add shielding where appropriate; (8) Arrange adjacent ground lines close to signal lines to more effectively prevent the emergence of new electric fields; (9) Place the decoupling line driver and receiver appropriately close to the actual I/O interface, which can reduce the coupling between the PCB and other circuits and reduce radiation and sensitivity; (10) Shield and twist the interfering leads together to eliminate mutual coupling on the PCB; (11) Add clamping diodes to inductive loads.
3 Measures to be taken in DSP software design
Software interference is mainly manifested in the following aspects: (1) Incorrect algorithms produce wrong results. The main reason is that the program exponential operation in the computer processor is an approximate calculation, and the results produced sometimes have large errors, which are prone to malfunctions; (2) Due to the low precision of the computer, the addition and subtraction operations must be correct, and the large number "eats up" the small number, resulting in error accumulation, leading to underflow, which is also one of the sources of noise; (3) Computer problems caused by hardware interference include: changes in the program counter PC value, increased data acquisition errors, control state failure, changes in RAM data due to interference, and system "deadlock".
3.1 Methods for intercepting out-of-control programs
(1) Single-byte instructions should be used more often during program design, and some no-operation instructions should be inserted at key points, or valid single-byte instructions should be repeated several times. This can protect the subsequent instructions from being disassembled and keep the program running on track; (2) Add software traps: When the PC value is out of control and the program is out of control, the CPU enters the non-program area. At this time, a boot instruction can be used to force the program to enter the initial entry state and enter the program area. A trap can be set every section; (3) Software reset: When the program "runs away", the monitoring system is run to automatically reset the system and reinitialize it.
3.2 Set up flag judgment
Define a unit as a flag, set the value of the unit to a certain characteristic value in the main program of the module, and then judge whether the value of the unit remains unchanged at the end of the main program. If it is different, it means that there is an error, and the program will enter the error handling subroutine.
3.3 Add data security backup
Important data is stored in more than two storage areas, and a large-capacity external RAM can also be used to back up the data. Permanent data is made into tables and solidified in EPROM, which can not only prevent data and tables from being destroyed, but also ensure that data is not run as instructions when the program logic is confused.
4 Several key factors that should be paid attention to when using EDA tools for design
The design of high-speed digital circuits requires the experience of designers on the one hand, and the support of excellent EDA tools on the other hand. EDA software has become multifunctional and intelligent. With the application of high-density single chips, high-density connectors, micro-hole built-in technology and 3D boards in printed circuit board design, layout and wiring have become more and more integrated and have become an important part of the design process. Software technologies such as automatic layout and free-angle wiring have gradually become important methods to solve such highly integrated problems. Using such software, manufacturable circuit boards can be designed within a specified time frame. At present, due to the increasingly shorter time to market, manual wiring is extremely time-consuming and can no longer meet the requirements. Therefore, layout and wiring tools are now required to have automatic wiring functions to quickly respond to the higher requirements of the market for product design.
4.1 Automatic routing technology
Due to the need to consider high-density design factors such as electromagnetic compatibility (EMC) and electromagnetic interference, crosstalk, signal delay and differential pair routing, the constraints of layout and routing are increasing every year. A few years ago, a general circuit board only needed 6 differential pairs for routing, but now it needs 600 pairs. It is impossible to rely solely on manual routing to achieve these 600 pairs of routing within a certain period of time, so automatic routing tools are indispensable. Although the number of nodes (nets) in today's design has not changed much compared to a few years ago, only the complexity of silicon chips has increased, but the proportion of important nodes in the design has greatly increased. Of course, for some particularly important nodes, the layout and routing tools are required to distinguish them, but there is no need to restrict each pin or node.
4.2 Methods to be noted when using free-angle routing technology
With the increase of integrated functions on monolithic devices, the number of output pins has also increased greatly, but the package size has not increased accordingly. Coupled with the limitations of pin spacing and impedance factors, such devices must use finer line widths. At the same time, due to the overall reduction in product size, it means that the space used for layout and routing has also been greatly reduced. In some DSP products, the size of the baseboard is almost the same as the size of the devices on it, and the components occupy up to 80% of the board area. The pins of some high-density components are staggered, and even tools with 45° routing functions cannot be used for automatic routing. The free-angle routing tool has great flexibility and can maximize the routing density; its pull-tightening function allows each node to be automatically shortened after routing to adapt to space requirements; it can greatly reduce signal delays and reduce the number of parallel paths, helping to avoid crosstalk. The use of free-angle routing technology can make the design manufacturable and the designed circuit performance is good.
4.3 Technology to be used for high-density devices The
latest high-density system-level chips use BGA or COB packaging, and the pin pitch is getting smaller and smaller. The ball pitch has been as low as 1mm and will continue to decrease. This makes it impossible to lead out the signal lines of the package using traditional routing tools. There are currently two ways to solve this problem: (1) lead the signal line from the lower layer through the hole under the ball; (2) use ultra-fine wiring and free-angle wiring to find a lead channel in the ball grid array. For high-density devices, the only feasible method is to use a wiring method with extremely small width and space, because only in this way can a high yield rate be guaranteed. Modern wiring technology also requires the ability to automatically apply these constraints. The free wiring method can reduce the number of wiring layers and reduce product costs. It also means that some ground layers and power layers can be added to improve signal integrity and EMC performance while keeping the cost unchanged.

4.4 Use other new circuit board design and production technologies
The application of micro-hole plasma etching technology in the multi-layer board process in DSP has greatly improved the performance of layout and routing tools. The application of plasma etching to add a new hole within the path width will not increase the cost of the base plate itself and the manufacturing cost, because the cost of making a thousand holes by plasma etching is as low as the cost of making one hole. This requires greater flexibility in routing tools. It must be able to apply different constraints and adapt to the requirements of different micro-holes and construction technologies. The increasing density of components has also affected the layout design. The layout and routing tools always assume that there is enough space on the board for the component release machine to release the surface to install new components without affecting the existing components on the board. However, the sequential placement of components will cause such a problem that the optimal position of each component on the board will change every time a new component is placed. This is why the layout design process has a low degree of automation and a high degree of manual intervention. Although the current layout tools have no restrictions on the number of components to be laid out sequentially, some technicians believe that the layout tools are actually limited when used for sequential layout, and this limit is about 500 components. Some technicians believe that when there are as many as 4,000 components placed on a board, it will cause great problems. Compared with sequential algorithm technology, parallel layout technology can achieve better automatic layout results.
4.5 Three-dimensional layout tools
3D tools are mainly used for the layout and routing of special-shaped and fixed-shaped boards, which are increasingly widely used. For example, Zuken's latest Freedom tool first uses a three-dimensional baseboard model to perform spatial layout of components, and then performs two-dimensional routing. The routing process can also tell whether the board is manufacturable. The routing tool must also be able to handle the design method of using shadow differential pairs on two different layers, because this design method has become increasingly important. As signal frequencies continue to increase, tools that integrate layout and routing tools with advanced simulation tools for virtual prototypes have appeared, such as Zuken's Hot Stage tool. Therefore, routing issues can be considered even in the virtual prototype stage. We believe that new software technologies such as free-angle routing, automatic layout and 3D layout will become common design tools for baseboard designers like automatic routing technology. Designers can use these new tools to solve new technical problems such as electromagnetic compatibility in microvias and monolithic high-density integrated systems.
5 Conclusion
The frequency range of electromagnetic compatibility technology is as wide as 0 to 400 GHz. In addition to traditional facilities, the research objects involve chip level, various types of ships, space shuttles, intercontinental missiles, and even the electromagnetic environment of the entire earth. Electromagnetic compatibility technology is also an important issue to be considered in DSP system design. Appropriate noise reduction technology should be used to make the DSP system meet the EMC standard. Its electromagnetic compatibility is a key research field with distinctive characteristics. It is urgent to solve the electromagnetic compatibility problems of electrical and electronic products (including DSP systems) and effectively improve product quality to make them "green products".

Keywords：DSP Reference address：Solving the electromagnetic compatibility problem of DSP design

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