Design of fully digital UPS inverter based on DSP control

1 Introduction

With the continuous development of information processing technology, especially the widespread application of computers and the rapid development of the Internet, the reliability requirements of power supply systems are getting higher and higher, so the requirements for the technical indicators of uninterruptible power supplies (UPS) are also getting higher and higher. high. The core part of the UPS is a constant frequency and constant voltage inverter. Since traditional analog control requires the use of a large number of discrete components, aging and temperature drift seriously affect the long-term stability of the system. Digital control technology based on DSP can greatly improve product consistency, increase control flexibility, and improve the stability and reliability of the entire system ^[1] . This article mainly proposes a digitally controlled UPS inverter structure and discusses the parameter design of the control system in detail.

2 System Structure

Figure 1 is the structural block diagram of the digitally controlled UPS inverter proposed in this article. The main circuit adopts a full-bridge structure, and the control circuit is an all-digital controller with TI's motor control dedicated DSP chip TMS320F240 as the core ^[2] . Lf and Cf are the output filter inductor and filter capacitor of the inverter, rL and rC are the series parasitic resistances of the filter components respectively. Considering the accuracy of control and the cost of the product, the control system adopts a system control method in which resistance sampling is used, and the main power circuit and the control circuit share the same ground. Rs1 and Rs2 are the output voltage sampling resistors, and Rc is the inductor current sampling resistor. The voltage and current sampling signals pass through the sampling network and are input to the A/D conversion port of the DSP. The PWM module of the DSP outputs 4 PWM signals and drives 4 IGBT tubes through the drive circuit.

3 Control system design

3.1 Digital dual-loop controller structure

There are many schemes for inverter control ^[3] . The UPS inverter in this article adopts the digital double-loop PI control method of inductor current mode. The specific inverter digital control block diagram is shown in Figure 2. The dotted box in the figure is divided into the main circuit of the inverter, Vref is the sine wave data table stored in the DSP program space, and VAB is the voltage between the midpoints of the two arms of the inverter bridge. In order to suppress high-frequency noise in the feedback amount and improve the accuracy of sampling, a resistor-capacitor low-pass filter is added to the feedback channel. The output of the voltage error signal after being adjusted by the digital PI is used as a command for the current loop, and the current error signal is then proportionally adjusted to obtain the current loop output. Four gate pulses are obtained after comparing the current loop output with the triangular wave generated by the timer.

3.2 Parameter design of current loop and voltage loop

Figure 3 is a simplified current inner loop block diagram. Zoh is the zero-order holding link, and its s-domain transfer function is , where Ts is the sampling period.

The voltage and current sampling periods designed in this article are both 50μs. The open-loop pulse transfer function of the current loop is:

Figure 4 is a simplified voltage outer loop control block diagram. where is the general form of the pulse transfer function of the voltage outer loop digital PI controller, K ₁ -K ₂ =K _I T _s , K _I is the integral coefficient.

Since the tracking speed of the current inner loop designed above is much faster than that of the voltage outer loop, when designing the voltage outer loop, the following reasonable simplifications are made: assuming that the inductor current can already track the command current, it can be assumed that the current inner loop is a unit proportional link 1. Thus, the open-loop pulse transfer function of the voltage outer loop is: (ignoring the series resistance rC of the capacitor), and the characteristic equation of its closed-loop transfer function is: . Similarly, according to the deadbeat control principle, let the characteristic root be 0, and K1 can be any constant. K1 can be determined based on the relationship between K1 and K2 and combined with simulation methods.

In the above control parameter design process, a simplified block diagram of unit feedback is used. There will definitely be a proportional link in the feedback channel of the actual line. Therefore, based on the above design, the control block diagram must be transformed according to the actual feedback proportion, and we get final control link parameters.

3 Sampling control timing design

Figure 5 is a schematic diagram of the sampling control timing proposed in this article. t0-t4 is a switching cycle. Due to the frequency-doubled unipolar sine wave pulse width modulation method, the pulsating frequency of the output filter inductor is twice the switching frequency, which can reduce the size of the filter components. At the time t1 when the timer cycle is interrupted, two A/D converters are started at the same time to sample the voltage and current feedback quantities. The A/D conversion ends at time t2, and the dual-loop control algorithm is immediately executed until time t3. At the time t4 of the timer underflow interrupt, the calculated comparison value CMPRx is loaded. Obviously, in this sampling control method, the control point is only delayed by half a switching cycle relative to the sampling point, which is better than the sampling control method delayed by one switching cycle reported in many literatures ^[4][5] . The real-time nature of the control is A great improvement has been obtained, which has been verified by simulations and experiments.

4 Simulation and Experimental Results

Table 1 lists some main parameters of the digitally controlled inverter proposed in this paper.

Before conducting the actual experiment, the SIMULINK toolbox of MATLAB was used to simulate the UPS inverter system. Figure 6 shows the simulation waveforms of the output voltage and load current during load switching.

Figure 7(a) shows the steady-state experimental waveforms of the output voltage and inductor current under full load 3kVA. Measured with LEM's clamp meter HEMEANALYST2060: THD=1.4%. The experimental data shows that the control system has good steady-state characteristics. Figure 7(b) shows the experimental waveforms of load voltage and load current when switching from half load to full load, and Figure 7(c) shows the switching from full load to half load. The experimental waveforms agree well with the simulation waveforms, showing that the inverter can quickly adjust the output voltage to a steady state, indicating that the control system has good dynamic characteristics.

5 Conclusion

Compared with analog control technology, DSP-based all-digital control technology greatly simplifies the design of control circuits and increases control flexibility. At the same time, digital deadbeat control technology and a sampling control method that delays half the switching cycle are adopted to greatly improve the dynamic characteristics of the inverter. Both simulation and experiments have verified the advancement and practicability of this DSP-based all-digital control scheme.