The low noise amplifier (LNA) is an important part of the RF transceiver. It can effectively improve the receiver's receiving sensitivity and thus increase the transmission distance of the transceiver. Therefore, whether the design of the low noise amplifier is good or not is related to the communication quality of the entire communication system. This article takes the transistor ATF-54143 as an example to illustrate the design methods of two different low noise amplifiers. Its frequency range is 2 to 2.2 GHz; the transistor operating voltage is 3 V; the operating current is 40 mA; the input and output impedance is 50 Ω.
1 Qualitative analysis
1.1 Transistor modeling
You can consult the relevant information of the transistor manufacturer through the Internet, download the transistor model provided by the manufacturer, or download the S2P file of the tube according to actual needs. In this example, the S2P file of the tube is directly imported into the software, and the circuit is designed using S parameters as the model. If it is the first time to import, you can use the module S-Params to perform S parameter simulation, observe whether the obtained S parameters are the same as the data provided by the S2P file, and at the same time, measure the input impedance of the transistor and the corresponding minimum noise factor, and judge the stability of the transistor, etc., to prepare for the next step.
1.2 Stability of transistors
After completing the S parameter simulation of the circuit, it can be found that the mu of the input/output end is less than 1 between the frequencies of 2 and 2.2 GHz. According to the RF related theory, the transistor is unstable. By connecting a 10 Ω and 5 pF capacitor in parallel at the output end, the values of m2 and m3 are both greater than 1, as shown in Figure 1 and Figure 2. The transistor achieves conditional stability within the bandwidth, and the input impedance at 2.1 GHz is measured to be 16.827-j16.041. At the same time, it is found that due to the addition of a resistor at the output end, Fmin increases from 0.48 to 0.573, Γopt is 0.329∠125.99°, and Zopt=(30.007+j17.754)Ω. Among them, Γopt is the optimal source reflection coefficient.
1.3 Formulate a plan
As shown in Figure 3, the available gain circle family and the noise coefficient circle family are drawn on the same Γs plane. Through analysis, it can be seen that if the available gain circle passes through the position of the optimal noise coefficient point and the input circuit is matched according to this point, the noise coefficient is the smallest for the LNA at this time, but its gain does not reach the optimal amplification. Therefore, it is obtained by sacrificing the available gain. In this case, the transistor gain can reach about 14 dB, and Fmin is about 0.48, as shown in Figure 3.
Another solution is to strike a balance between available gain and noise figure, aiming to match with as little noise as possible, and adopt a design solution that takes gain into consideration. In this case, the transistor gain is about 15 dB, and Fmin is about 0.7 (see Figure 3). This is the second solution mentioned in this article.
2 Simulation of the solution with the best noise figure as the design target
2.1 Input matching circuit design
For low noise amplifiers, in order to obtain the minimum noise figure, Γs has an optimal Γopt coefficient value, at which point the LNA achieves the minimum noise figure, that is, the best noise matching state. When the matching state deviates from the optimal position, the noise figure of the LNA will increase. In the previous qualitative analysis, Γopt=0.329∠125.99° and the corresponding Zopt=30.007+j17.754 Ω have been obtained. Next, the Passive Circuit/Microstrip ControlWindow tool of ADS can be used to automatically generate the matching circuit of the input port.
Add a DA_SSMatehl smart module to the schematic diagram, and then modify the settings: F=2.1 GHz, Zin=50 Ω. It is worth noting that when using this tool to generate a matching circuit, Zload is the conjugate of Zopt. After the settings are completed, add an MSub control, which is mainly used to describe the basic information of the substrate. Modify the settings to H=0.8 mm, Er=4.3, Mur=1, Cond=5.88×107, Hu=1.0e+33 mm, T=0.03 mil. After the settings are completed, the automatic matching circuit can be generated, and the resulting circuit is shown in Figure 4.
After adding the input matching circuit to Figure 1, the S parameter simulation is performed. It can be seen that the position of the optimal noise coefficient Γopt is successfully matched to the position of 50 Ω due to the addition of the input matching circuit.
2.2 Output matching circuit design The
output matching circuit is designed according to the maximum power gain principle (considering the existence of the output stabilization circuit and the influence on the output impedance, the stabilization circuit should be calculated when measuring the output impedance), that is, the output impedance (Zopt=8.055-j8.980, as shown in Figure 5) is matched to 50 Ω using the above method. The obtained output matching circuit is shown in Figure 6.
2.3 Simulation results
Observing the final simulation results, it can be seen that the gain is 14.4 dB; the noise coefficient is 0.586, which is very close to the optimal noise coefficient of the transistor after stabilization of 0.573, and the gain flatness is low, and the stability performance is excellent. The specific performance indicators are shown in Figure 7.
3 Simulation of the scheme with noise figure as the main design target and gain as the consideration
3.1 Input matching circuit design
If the substrate material is epoxy glass FR-4 substrate, the dielectric constant is 4.3, and the thickness is 0.8 mm, the transistor input impedance at 2.1 GHz is 1 6.827-j16.041. Using the above matching circuit generation method, the input matching circuit is designed using the single branch module in the ADS design wizard. The matching circuit in Figure 8 can be quickly obtained. As shown in Figure 9, m6=50(0.927+j0.001). It is very close to 50 Ω, so the input matching obtained is reasonable.
3.2 Output matching circuit design
After completing the input matching circuit design, the output matching circuit can be designed. Here, the advantages of CAD software are fully utilized and optimized methods are used to achieve this. The basic process is as follows:
add the results of the input matching circuit to Figure 10, and add the microstrip shown in the figure to the output end of the transistor. Bring up the optimization controls and set the optimization targets to -20 dB(S(11)) and -15 dB(S(22)).
At the beginning of the optimization, the width of TL1, TL2, and TL3 is set to 61.394 mil. This is to ensure that the characteristic impedance of the microstrip line is 50 Ω when considering factors such as the board material and the thickness of the board material. The lengths of TL1, TL2, and TL3 are preset. After optimization once, refresh the results to observe whether the indicators of various charts are better and whether the values reach the set maximum values. If they reach the maximum values, change the set values again and optimize again. After repeated attempts, these values will be changed again. If the changes have little effect on various indicators, you can try to change the values of the resistors and input matching and then optimize.
Through multiple debugging, it is found that the gain, noise factor, and input-output standing wave ratio are better when R1 is set to 15 Ω and TL7 is added. The schematic diagram of the simulation circuit and the optimization controls and target controls are shown in Figure 10.
3.3 Simulation results
Observing the final simulation results, it can be seen that the gain is 15.816 dB; the noise factor is 0.708, which are better than those in the qualitative analysis. Other performance indicators are shown in Figure 11.
4 Conclusion
Through qualitative analysis of transistors, the design scheme of low-noise preamplifier can be selected according to actual needs. The best noise coefficient of the first scheme is obtained at the expense of gain; the second scheme is obtained at the expense of improving the noise coefficient and reducing the value of the standing wave ratio VSWR. Both methods can be quickly implemented using computer-aided design tools, and each has its own value, which has been applied in many occasions.
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